src/arch/SConscript

   1 # -*- mode:python -*-
   2
   3 # Copyright (c) 2006 The Regents of The University of Michigan
   4 # All rights reserved.
   5 #
   6 # Redistribution and use in source and binary forms, with or without
   7 # modification, are permitted provided that the following conditions are
   8 # met: redistributions of source code must retain the above copyright
   9 # notice, this list of conditions and the following disclaimer;
  10 # redistributions in binary form must reproduce the above copyright
  11 # notice, this list of conditions and the following disclaimer in the
  12 # documentation and/or other materials provided with the distribution;
  13 # neither the name of the copyright holders nor the names of its
  14 # contributors may be used to endorse or promote products derived from
  15 # this software without specific prior written permission.
  16 #
  17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 #
  29 # Authors: Steve Reinhardt
  30
  31 import sys
  32
  33 Import('*')
  34
  35 #################################################################
  36 #
  37 # ISA "switch header" generation.
  38 #
  39 # Auto-generate arch headers that include the right ISA-specific
  40 # header based on the setting of THE_ISA preprocessor variable.
  41 #
  42 #################################################################
  43
  44 # List of headers to generate
  45 isa_switch_hdrs = Split('''
  46         arguments.hh
  47         faults.hh
  48         interrupts.hh
  49         isa_traits.hh
  50         kernel_stats.hh
  51         locked_mem.hh
  52         microcode_rom.hh
  53         mmaped_ipr.hh
  54         process.hh
  55         predecoder.hh
  56         regfile.hh
  57         remote_gdb.hh
  58         stacktrace.hh
  59         syscallreturn.hh
  60         tlb.hh
  61         types.hh
  62         utility.hh
  63         vtophys.hh
  64         ''')
  65
  66 # Set up this directory to support switching headers
  67 make_switching_dir('arch', isa_switch_hdrs, env)
  68
  69 #################################################################
  70 #
  71 # Include architecture-specific files.
  72 #
  73 #################################################################
  74
  75 #
  76 # Build a SCons scanner for ISA files
  77 #
  78 import SCons.Scanner
  79
  80 isa_scanner = SCons.Scanner.Classic("ISAScan",
  81                                     [".isa", ".ISA"],
  82                                     "SRCDIR",
  83                                     r'^\s*##include\s+"([\w/.-]*)"')
  84
  85 env.Append(SCANNERS = isa_scanner)
  86
  87 #
  88 # Now create a Builder object that uses isa_parser.py to generate C++
  89 # output from the ISA description (*.isa) files.
  90 #
  91
  92 # Convert to File node to fix path
  93 isa_parser = File('isa_parser.py')
  94 cpu_models_file = File('../cpu/cpu_models.py')
  95
  96 # This sucks in the defintions of the CpuModel objects.
  97 execfile(cpu_models_file.srcnode().abspath)
  98
  99 # Several files are generated from the ISA description.
 100 # We always get the basic decoder and header file.
 101 isa_desc_gen_files = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ]
 102 # We also get an execute file for each selected CPU model.
 103 isa_desc_gen_files += [CpuModel.dict[cpu].filename
 104                        for cpu in env['CPU_MODELS']]
 105
 106 # Also include the CheckerCPU as one of the models if it is being
 107 # enabled via command line.
 108 if env['USE_CHECKER']:
 109     isa_desc_gen_files += [CpuModel.dict['CheckerCPU'].filename]
 110
 111 # The emitter patches up the sources & targets to include the
 112 # autogenerated files as targets and isa parser itself as a source.
 113 def isa_desc_emitter(target, source, env):
 114     return (isa_desc_gen_files, [isa_parser, cpu_models_file] + source)
 115
 116 # Pieces are in place, so create the builder.
 117 python = sys.executable  # use same Python binary used to run scons
 118
 119 # Also include the CheckerCPU as one of the models if it is being
 120 # enabled via command line.
 121 if env['USE_CHECKER']:
 122     isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS CheckerCPU',
 123                                emitter = isa_desc_emitter)
 124 else:
 125     isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS',
 126                                emitter = isa_desc_emitter)
 127
 128 env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })