src/arch/SConscript

   1 # -*- mode:python -*-
   2
   3 # Copyright (c) 2006 The Regents of The University of Michigan
   4 # All rights reserved.
   5 #
   6 # Redistribution and use in source and binary forms, with or without
   7 # modification, are permitted provided that the following conditions are
   8 # met: redistributions of source code must retain the above copyright
   9 # notice, this list of conditions and the following disclaimer;
  10 # redistributions in binary form must reproduce the above copyright
  11 # notice, this list of conditions and the following disclaimer in the
  12 # documentation and/or other materials provided with the distribution;
  13 # neither the name of the copyright holders nor the names of its
  14 # contributors may be used to endorse or promote products derived from
  15 # this software without specific prior written permission.
  16 #
  17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28 #
  29 # Authors: Steve Reinhardt
  30
  31 import sys
  32
  33 Import('*')
  34
  35 #################################################################
  36 #
  37 # ISA "switch header" generation.
  38 #
  39 # Auto-generate arch headers that include the right ISA-specific
  40 # header based on the setting of THE_ISA preprocessor variable.
  41 #
  42 #################################################################
  43
  44 # List of headers to generate
  45 isa_switch_hdrs = Split('''
  46         arguments.hh
  47         faults.hh
  48         interrupts.hh
  49         isa_traits.hh
  50         kernel_stats.hh
  51         locked_mem.hh
  52         mmaped_ipr.hh
  53         process.hh
  54         predecoder.hh
  55         regfile.hh
  56         remote_gdb.hh
  57         stacktrace.hh
  58         syscallreturn.hh
  59         tlb.hh
  60         types.hh
  61         utility.hh
  62         vtophys.hh
  63         ''')
  64
  65 # Set up this directory to support switching headers
  66 make_switching_dir('arch', isa_switch_hdrs, env)
  67
  68 #################################################################
  69 #
  70 # Include architecture-specific files.
  71 #
  72 #################################################################
  73
  74 #
  75 # Build a SCons scanner for ISA files
  76 #
  77 import SCons.Scanner
  78
  79 isa_scanner = SCons.Scanner.Classic("ISAScan",
  80                                     [".isa", ".ISA"],
  81                                     "SRCDIR",
  82                                     r'^\s*##include\s+"([\w/.-]*)"')
  83
  84 env.Append(SCANNERS = isa_scanner)
  85
  86 #
  87 # Now create a Builder object that uses isa_parser.py to generate C++
  88 # output from the ISA description (*.isa) files.
  89 #
  90
  91 # Convert to File node to fix path
  92 isa_parser = File('isa_parser.py')
  93 cpu_models_file = File('../cpu/cpu_models.py')
  94
  95 # This sucks in the defintions of the CpuModel objects.
  96 execfile(cpu_models_file.srcnode().abspath)
  97
  98 # Several files are generated from the ISA description.
  99 # We always get the basic decoder and header file.
 100 isa_desc_gen_files = [ 'decoder.cc', 'decoder.hh' ]
 101 # We also get an execute file for each selected CPU model.
 102 isa_desc_gen_files += [CpuModel.dict[cpu].filename
 103                        for cpu in env['CPU_MODELS']]
 104
 105 # Also include the CheckerCPU as one of the models if it is being
 106 # enabled via command line.
 107 if env['USE_CHECKER']:
 108     isa_desc_gen_files += [CpuModel.dict['CheckerCPU'].filename]
 109
 110 # The emitter patches up the sources & targets to include the
 111 # autogenerated files as targets and isa parser itself as a source.
 112 def isa_desc_emitter(target, source, env):
 113     return (isa_desc_gen_files, [isa_parser, cpu_models_file] + source)
 114
 115 # Pieces are in place, so create the builder.
 116 python = sys.executable  # use same Python binary used to run scons
 117
 118 # Also include the CheckerCPU as one of the models if it is being
 119 # enabled via command line.
 120 if env['USE_CHECKER']:
 121     isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS CheckerCPU',
 122                                emitter = isa_desc_emitter)
 123 else:
 124     isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS',
 125                                emitter = isa_desc_emitter)
 126
 127 env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })