X86: Compute PCI config addresses correctly.
[gem5.git] / src / arch / alpha / faults.hh
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32 #ifndef __ARCH_ALPHA_FAULTS_HH__
33 #define __ARCH_ALPHA_FAULTS_HH__
34
35 #include "arch/alpha/pagetable.hh"
36 #include "config/full_system.hh"
37 #include "sim/faults.hh"
38
39 // The design of the "name" and "vect" functions is in sim/faults.hh
40
41 namespace AlphaISA {
42
43 typedef const Addr FaultVect;
44
45 class AlphaFault : public FaultBase
46 {
47 protected:
48 virtual bool skipFaultingInstruction() {return false;}
49 virtual bool setRestartAddress() {return true;}
50 public:
51 #if FULL_SYSTEM
52 void invoke(ThreadContext * tc);
53 #endif
54 virtual FaultVect vect() = 0;
55 virtual FaultStat & countStat() = 0;
56 };
57
58 class MachineCheckFault : public AlphaFault
59 {
60 private:
61 static FaultName _name;
62 static FaultVect _vect;
63 static FaultStat _count;
64
65 public:
66 FaultName name() const {return _name;}
67 FaultVect vect() {return _vect;}
68 FaultStat & countStat() {return _count;}
69 bool isMachineCheckFault() const {return true;}
70 };
71
72 class AlignmentFault : public AlphaFault
73 {
74 private:
75 static FaultName _name;
76 static FaultVect _vect;
77 static FaultStat _count;
78
79 public:
80 FaultName name() const {return _name;}
81 FaultVect vect() {return _vect;}
82 FaultStat & countStat() {return _count;}
83 bool isAlignmentFault() const {return true;}
84 };
85
86 static inline Fault genMachineCheckFault()
87 {
88 return new MachineCheckFault;
89 }
90
91 class ResetFault : public AlphaFault
92 {
93 private:
94 static FaultName _name;
95 static FaultVect _vect;
96 static FaultStat _count;
97
98 public:
99 FaultName name() const {return _name;}
100 FaultVect vect() {return _vect;}
101 FaultStat & countStat() {return _count;}
102 };
103
104 class ArithmeticFault : public AlphaFault
105 {
106 private:
107 static FaultName _name;
108 static FaultVect _vect;
109 static FaultStat _count;
110
111 protected:
112 bool skipFaultingInstruction() {return true;}
113
114 public:
115 FaultName name() const {return _name;}
116 FaultVect vect() {return _vect;}
117 FaultStat & countStat() {return _count;}
118 #if FULL_SYSTEM
119 void invoke(ThreadContext * tc);
120 #endif
121 };
122
123 class InterruptFault : public AlphaFault
124 {
125 private:
126 static FaultName _name;
127 static FaultVect _vect;
128 static FaultStat _count;
129
130 protected:
131 bool setRestartAddress() {return false;}
132
133 public:
134 FaultName name() const {return _name;}
135 FaultVect vect() {return _vect;}
136 FaultStat & countStat() {return _count;}
137 };
138
139 class DtbFault : public AlphaFault
140 {
141 protected:
142 VAddr vaddr;
143 Request::Flags reqFlags;
144 uint64_t flags;
145
146 public:
147 DtbFault(VAddr _vaddr, Request::Flags _reqFlags, uint64_t _flags)
148 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
149 { }
150 FaultName name() const = 0;
151 FaultVect vect() = 0;
152 FaultStat & countStat() = 0;
153 #if FULL_SYSTEM
154 void invoke(ThreadContext * tc);
155 #endif
156 };
157
158 class NDtbMissFault : public DtbFault
159 {
160 private:
161 static FaultName _name;
162 static FaultVect _vect;
163 static FaultStat _count;
164
165 public:
166 NDtbMissFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
167 : DtbFault(vaddr, reqFlags, flags)
168 { }
169 FaultName name() const {return _name;}
170 FaultVect vect() {return _vect;}
171 FaultStat & countStat() {return _count;}
172 #if !FULL_SYSTEM
173 void invoke(ThreadContext * tc);
174 #endif
175 };
176
177 class PDtbMissFault : public DtbFault
178 {
179 private:
180 static FaultName _name;
181 static FaultVect _vect;
182 static FaultStat _count;
183
184 public:
185 PDtbMissFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
186 : DtbFault(vaddr, reqFlags, flags)
187 { }
188 FaultName name() const {return _name;}
189 FaultVect vect() {return _vect;}
190 FaultStat & countStat() {return _count;}
191 };
192
193 class DtbPageFault : public DtbFault
194 {
195 private:
196 static FaultName _name;
197 static FaultVect _vect;
198 static FaultStat _count;
199
200 public:
201 DtbPageFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
202 : DtbFault(vaddr, reqFlags, flags)
203 { }
204 FaultName name() const {return _name;}
205 FaultVect vect() {return _vect;}
206 FaultStat & countStat() {return _count;}
207 };
208
209 class DtbAcvFault : public DtbFault
210 {
211 private:
212 static FaultName _name;
213 static FaultVect _vect;
214 static FaultStat _count;
215
216 public:
217 DtbAcvFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
218 : DtbFault(vaddr, reqFlags, flags)
219 { }
220 FaultName name() const {return _name;}
221 FaultVect vect() {return _vect;}
222 FaultStat & countStat() {return _count;}
223 };
224
225 class DtbAlignmentFault : public DtbFault
226 {
227 private:
228 static FaultName _name;
229 static FaultVect _vect;
230 static FaultStat _count;
231
232 public:
233 DtbAlignmentFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
234 : DtbFault(vaddr, reqFlags, flags)
235 { }
236 FaultName name() const {return _name;}
237 FaultVect vect() {return _vect;}
238 FaultStat & countStat() {return _count;}
239 };
240
241 class ItbFault : public AlphaFault
242 {
243 protected:
244 Addr pc;
245
246 public:
247 ItbFault(Addr _pc) : pc(_pc) { }
248 FaultName name() const = 0;
249 FaultVect vect() = 0;
250 FaultStat & countStat() = 0;
251 #if FULL_SYSTEM
252 void invoke(ThreadContext * tc);
253 #endif
254 };
255
256 class ItbPageFault : public ItbFault
257 {
258 private:
259 static FaultName _name;
260 static FaultVect _vect;
261 static FaultStat _count;
262
263 public:
264 ItbPageFault(Addr pc) : ItbFault(pc) { }
265 FaultName name() const {return _name;}
266 FaultVect vect() {return _vect;}
267 FaultStat & countStat() {return _count;}
268 #if !FULL_SYSTEM
269 void invoke(ThreadContext * tc);
270 #endif
271 };
272
273 class ItbAcvFault : public ItbFault
274 {
275 private:
276 static FaultName _name;
277 static FaultVect _vect;
278 static FaultStat _count;
279
280 public:
281 ItbAcvFault(Addr pc) : ItbFault(pc) { }
282 FaultName name() const {return _name;}
283 FaultVect vect() {return _vect;}
284 FaultStat & countStat() {return _count;}
285 };
286
287 class UnimplementedOpcodeFault : public AlphaFault
288 {
289 private:
290 static FaultName _name;
291 static FaultVect _vect;
292 static FaultStat _count;
293
294 public:
295 FaultName name() const {return _name;}
296 FaultVect vect() {return _vect;}
297 FaultStat & countStat() {return _count;}
298 };
299
300 class FloatEnableFault : public AlphaFault
301 {
302 private:
303 static FaultName _name;
304 static FaultVect _vect;
305 static FaultStat _count;
306
307 public:
308 FaultName name() const {return _name;}
309 FaultVect vect() {return _vect;}
310 FaultStat & countStat() {return _count;}
311 };
312
313 class PalFault : public AlphaFault
314 {
315 private:
316 static FaultName _name;
317 static FaultVect _vect;
318 static FaultStat _count;
319
320 protected:
321 bool skipFaultingInstruction() {return true;}
322
323 public:
324 FaultName name() const {return _name;}
325 FaultVect vect() {return _vect;}
326 FaultStat & countStat() {return _count;}
327 };
328
329 class IntegerOverflowFault : public AlphaFault
330 {
331 private:
332 static FaultName _name;
333 static FaultVect _vect;
334 static FaultStat _count;
335
336 public:
337 FaultName name() const {return _name;}
338 FaultVect vect() {return _vect;}
339 FaultStat & countStat() {return _count;}
340 };
341
342 } // namespace AlphaISA
343
344 #endif // __ARCH_ALPHA_FAULTS_HH__