src/arch/alpha/faults.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  *          Kevin Lim
  30  */
  31
  32 #ifndef __ALPHA_FAULTS_HH__
  33 #define __ALPHA_FAULTS_HH__
  34
  35 #include "config/full_system.hh"
  36 #include "sim/faults.hh"
  37
  38 #if FULL_SYSTEM
  39 #include "arch/alpha/pagetable.hh"
  40 #endif
  41
  42 // The design of the "name" and "vect" functions is in sim/faults.hh
  43
  44 namespace AlphaISA
  45 {
  46
  47 typedef const Addr FaultVect;
  48
  49 class AlphaFault : public FaultBase
  50 {
  51   protected:
  52     virtual bool skipFaultingInstruction() {return false;}
  53     virtual bool setRestartAddress() {return true;}
  54   public:
  55 #if FULL_SYSTEM
  56     void invoke(ThreadContext * tc);
  57 #endif
  58     virtual FaultVect vect() = 0;
  59     virtual FaultStat & countStat() = 0;
  60 };
  61
  62 class MachineCheckFault : public AlphaFault
  63 {
  64   private:
  65     static FaultName _name;
  66     static FaultVect _vect;
  67     static FaultStat _count;
  68   public:
  69     FaultName name() {return _name;}
  70     FaultVect vect() {return _vect;}
  71     FaultStat & countStat() {return _count;}
  72     bool isMachineCheckFault() {return true;}
  73 };
  74
  75 class AlignmentFault : public AlphaFault
  76 {
  77   private:
  78     static FaultName _name;
  79     static FaultVect _vect;
  80     static FaultStat _count;
  81   public:
  82     FaultName name() {return _name;}
  83     FaultVect vect() {return _vect;}
  84     FaultStat & countStat() {return _count;}
  85     bool isAlignmentFault() {return true;}
  86 };
  87
  88 #if !FULL_SYSTEM
  89 class PageTableFault : public AlphaFault
  90 {
  91   private:
  92     Addr vaddr;
  93     static FaultName _name;
  94     static FaultVect _vect;
  95     static FaultStat _count;
  96   public:
  97     PageTableFault(Addr va)
  98         : vaddr(va) {}
  99     FaultName name() {return _name;}
 100     FaultVect vect() {return _vect;}
 101     FaultStat & countStat() {return _count;}
 102     void invoke(ThreadContext * tc);
 103 };
 104
 105 static inline Fault genPageTableFault(Addr va)
 106 {
 107     return new PageTableFault(va);
 108 }
 109 #endif
 110
 111 static inline Fault genMachineCheckFault()
 112 {
 113     return new MachineCheckFault;
 114 }
 115
 116 static inline Fault genAlignmentFault()
 117 {
 118     return new AlignmentFault;
 119 }
 120
 121 class ResetFault : public AlphaFault
 122 {
 123   private:
 124     static FaultName _name;
 125     static FaultVect _vect;
 126     static FaultStat _count;
 127   public:
 128     FaultName name() {return _name;}
 129     FaultVect vect() {return _vect;}
 130     FaultStat & countStat() {return _count;}
 131 };
 132
 133 class ArithmeticFault : public AlphaFault
 134 {
 135   protected:
 136     bool skipFaultingInstruction() {return true;}
 137   private:
 138     static FaultName _name;
 139     static FaultVect _vect;
 140     static FaultStat _count;
 141   public:
 142     FaultName name() {return _name;}
 143     FaultVect vect() {return _vect;}
 144     FaultStat & countStat() {return _count;}
 145 #if FULL_SYSTEM
 146     void invoke(ThreadContext * tc);
 147 #endif
 148 };
 149
 150 class InterruptFault : public AlphaFault
 151 {
 152   protected:
 153     bool setRestartAddress() {return false;}
 154   private:
 155     static FaultName _name;
 156     static FaultVect _vect;
 157     static FaultStat _count;
 158   public:
 159     FaultName name() {return _name;}
 160     FaultVect vect() {return _vect;}
 161     FaultStat & countStat() {return _count;}
 162 };
 163
 164 class DtbFault : public AlphaFault
 165 {
 166 #if FULL_SYSTEM
 167   private:
 168     AlphaISA::VAddr vaddr;
 169     uint32_t reqFlags;
 170     uint64_t flags;
 171   public:
 172     DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
 173         : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
 174     { }
 175 #endif
 176     FaultName name() = 0;
 177     FaultVect vect() = 0;
 178     FaultStat & countStat() = 0;
 179 #if FULL_SYSTEM
 180     void invoke(ThreadContext * tc);
 181 #endif
 182 };
 183
 184 class NDtbMissFault : public DtbFault
 185 {
 186   private:
 187     static FaultName _name;
 188     static FaultVect _vect;
 189     static FaultStat _count;
 190   public:
 191 #if FULL_SYSTEM
 192     NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
 193         : DtbFault(vaddr, reqFlags, flags)
 194     { }
 195 #endif
 196     FaultName name() {return _name;}
 197     FaultVect vect() {return _vect;}
 198     FaultStat & countStat() {return _count;}
 199 };
 200
 201 class PDtbMissFault : public DtbFault
 202 {
 203   private:
 204     static FaultName _name;
 205     static FaultVect _vect;
 206     static FaultStat _count;
 207   public:
 208 #if FULL_SYSTEM
 209     PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
 210         : DtbFault(vaddr, reqFlags, flags)
 211     { }
 212 #endif
 213     FaultName name() {return _name;}
 214     FaultVect vect() {return _vect;}
 215     FaultStat & countStat() {return _count;}
 216 };
 217
 218 class DtbPageFault : public DtbFault
 219 {
 220   private:
 221     static FaultName _name;
 222     static FaultVect _vect;
 223     static FaultStat _count;
 224   public:
 225 #if FULL_SYSTEM
 226     DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
 227         : DtbFault(vaddr, reqFlags, flags)
 228     { }
 229 #endif
 230     FaultName name() {return _name;}
 231     FaultVect vect() {return _vect;}
 232     FaultStat & countStat() {return _count;}
 233 };
 234
 235 class DtbAcvFault : public DtbFault
 236 {
 237   private:
 238     static FaultName _name;
 239     static FaultVect _vect;
 240     static FaultStat _count;
 241   public:
 242 #if FULL_SYSTEM
 243     DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
 244         : DtbFault(vaddr, reqFlags, flags)
 245     { }
 246 #endif
 247     FaultName name() {return _name;}
 248     FaultVect vect() {return _vect;}
 249     FaultStat & countStat() {return _count;}
 250 };
 251
 252 class DtbAlignmentFault : public DtbFault
 253 {
 254   private:
 255     static FaultName _name;
 256     static FaultVect _vect;
 257     static FaultStat _count;
 258   public:
 259 #if FULL_SYSTEM
 260     DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
 261         : DtbFault(vaddr, reqFlags, flags)
 262     { }
 263 #endif
 264     FaultName name() {return _name;}
 265     FaultVect vect() {return _vect;}
 266     FaultStat & countStat() {return _count;}
 267 };
 268
 269 class ItbFault : public AlphaFault
 270 {
 271   private:
 272     Addr pc;
 273   public:
 274     ItbFault(Addr _pc)
 275         : pc(_pc)
 276     { }
 277     FaultName name() = 0;
 278     FaultVect vect() = 0;
 279     FaultStat & countStat() = 0;
 280 #if FULL_SYSTEM
 281     void invoke(ThreadContext * tc);
 282 #endif
 283 };
 284
 285 class ItbMissFault : public ItbFault
 286 {
 287   private:
 288     static FaultName _name;
 289     static FaultVect _vect;
 290     static FaultStat _count;
 291   public:
 292     ItbMissFault(Addr pc)
 293         : ItbFault(pc)
 294     { }
 295     FaultName name() {return _name;}
 296     FaultVect vect() {return _vect;}
 297     FaultStat & countStat() {return _count;}
 298 };
 299
 300 class ItbPageFault : public ItbFault
 301 {
 302   private:
 303     static FaultName _name;
 304     static FaultVect _vect;
 305     static FaultStat _count;
 306   public:
 307     ItbPageFault(Addr pc)
 308         : ItbFault(pc)
 309     { }
 310     FaultName name() {return _name;}
 311     FaultVect vect() {return _vect;}
 312     FaultStat & countStat() {return _count;}
 313 };
 314
 315 class ItbAcvFault : public ItbFault
 316 {
 317   private:
 318     static FaultName _name;
 319     static FaultVect _vect;
 320     static FaultStat _count;
 321   public:
 322     ItbAcvFault(Addr pc)
 323         : ItbFault(pc)
 324     { }
 325     FaultName name() {return _name;}
 326     FaultVect vect() {return _vect;}
 327     FaultStat & countStat() {return _count;}
 328 };
 329
 330 class UnimplementedOpcodeFault : public AlphaFault
 331 {
 332   private:
 333     static FaultName _name;
 334     static FaultVect _vect;
 335     static FaultStat _count;
 336   public:
 337     FaultName name() {return _name;}
 338     FaultVect vect() {return _vect;}
 339     FaultStat & countStat() {return _count;}
 340 };
 341
 342 class FloatEnableFault : public AlphaFault
 343 {
 344   private:
 345     static FaultName _name;
 346     static FaultVect _vect;
 347     static FaultStat _count;
 348   public:
 349     FaultName name() {return _name;}
 350     FaultVect vect() {return _vect;}
 351     FaultStat & countStat() {return _count;}
 352 };
 353
 354 class PalFault : public AlphaFault
 355 {
 356   protected:
 357     bool skipFaultingInstruction() {return true;}
 358   private:
 359     static FaultName _name;
 360     static FaultVect _vect;
 361     static FaultStat _count;
 362   public:
 363     FaultName name() {return _name;}
 364     FaultVect vect() {return _vect;}
 365     FaultStat & countStat() {return _count;}
 366 };
 367
 368 class IntegerOverflowFault : public AlphaFault
 369 {
 370   private:
 371     static FaultName _name;
 372     static FaultVect _vect;
 373     static FaultStat _count;
 374   public:
 375     FaultName name() {return _name;}
 376     FaultVect vect() {return _vect;}
 377     FaultStat & countStat() {return _count;}
 378 };
 379
 380 } // AlphaISA namespace
 381
 382 #endif // __FAULTS_HH__