Merge with head.
[gem5.git] / src / arch / alpha / faults.hh
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32 #ifndef __ALPHA_FAULTS_HH__
33 #define __ALPHA_FAULTS_HH__
34
35 #include "config/full_system.hh"
36 #include "sim/faults.hh"
37
38 #if FULL_SYSTEM
39 #include "arch/alpha/pagetable.hh"
40 #endif
41
42 // The design of the "name" and "vect" functions is in sim/faults.hh
43
44 namespace AlphaISA
45 {
46
47 typedef const Addr FaultVect;
48
49 class AlphaFault : public FaultBase
50 {
51 protected:
52 virtual bool skipFaultingInstruction() {return false;}
53 virtual bool setRestartAddress() {return true;}
54 public:
55 #if FULL_SYSTEM
56 void invoke(ThreadContext * tc);
57 #endif
58 virtual FaultVect vect() = 0;
59 virtual FaultStat & countStat() = 0;
60 };
61
62 class MachineCheckFault : public AlphaFault
63 {
64 private:
65 static FaultName _name;
66 static FaultVect _vect;
67 static FaultStat _count;
68 public:
69 FaultName name() const {return _name;}
70 FaultVect vect() {return _vect;}
71 FaultStat & countStat() {return _count;}
72 bool isMachineCheckFault() const {return true;}
73 };
74
75 class AlignmentFault : public AlphaFault
76 {
77 private:
78 static FaultName _name;
79 static FaultVect _vect;
80 static FaultStat _count;
81 public:
82 FaultName name() const {return _name;}
83 FaultVect vect() {return _vect;}
84 FaultStat & countStat() {return _count;}
85 bool isAlignmentFault() const {return true;}
86 };
87
88 static inline Fault genMachineCheckFault()
89 {
90 return new MachineCheckFault;
91 }
92
93 static inline Fault genAlignmentFault()
94 {
95 return new AlignmentFault;
96 }
97
98 class ResetFault : public AlphaFault
99 {
100 private:
101 static FaultName _name;
102 static FaultVect _vect;
103 static FaultStat _count;
104 public:
105 FaultName name() const {return _name;}
106 FaultVect vect() {return _vect;}
107 FaultStat & countStat() {return _count;}
108 };
109
110 class ArithmeticFault : public AlphaFault
111 {
112 protected:
113 bool skipFaultingInstruction() {return true;}
114 private:
115 static FaultName _name;
116 static FaultVect _vect;
117 static FaultStat _count;
118 public:
119 FaultName name() const {return _name;}
120 FaultVect vect() {return _vect;}
121 FaultStat & countStat() {return _count;}
122 #if FULL_SYSTEM
123 void invoke(ThreadContext * tc);
124 #endif
125 };
126
127 class InterruptFault : public AlphaFault
128 {
129 protected:
130 bool setRestartAddress() {return false;}
131 private:
132 static FaultName _name;
133 static FaultVect _vect;
134 static FaultStat _count;
135 public:
136 FaultName name() const {return _name;}
137 FaultVect vect() {return _vect;}
138 FaultStat & countStat() {return _count;}
139 };
140
141 class DtbFault : public AlphaFault
142 {
143 #if FULL_SYSTEM
144 private:
145 AlphaISA::VAddr vaddr;
146 uint32_t reqFlags;
147 uint64_t flags;
148 public:
149 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
150 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
151 { }
152 #endif
153 FaultName name() const = 0;
154 FaultVect vect() = 0;
155 FaultStat & countStat() = 0;
156 #if FULL_SYSTEM
157 void invoke(ThreadContext * tc);
158 #endif
159 };
160
161 class NDtbMissFault : public DtbFault
162 {
163 private:
164 static FaultName _name;
165 static FaultVect _vect;
166 static FaultStat _count;
167 public:
168 #if FULL_SYSTEM
169 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
170 : DtbFault(vaddr, reqFlags, flags)
171 { }
172 #endif
173 FaultName name() const {return _name;}
174 FaultVect vect() {return _vect;}
175 FaultStat & countStat() {return _count;}
176 };
177
178 class PDtbMissFault : public DtbFault
179 {
180 private:
181 static FaultName _name;
182 static FaultVect _vect;
183 static FaultStat _count;
184 public:
185 #if FULL_SYSTEM
186 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
187 : DtbFault(vaddr, reqFlags, flags)
188 { }
189 #endif
190 FaultName name() const {return _name;}
191 FaultVect vect() {return _vect;}
192 FaultStat & countStat() {return _count;}
193 };
194
195 class DtbPageFault : public DtbFault
196 {
197 private:
198 static FaultName _name;
199 static FaultVect _vect;
200 static FaultStat _count;
201 public:
202 #if FULL_SYSTEM
203 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
204 : DtbFault(vaddr, reqFlags, flags)
205 { }
206 #endif
207 FaultName name() const {return _name;}
208 FaultVect vect() {return _vect;}
209 FaultStat & countStat() {return _count;}
210 };
211
212 class DtbAcvFault : public DtbFault
213 {
214 private:
215 static FaultName _name;
216 static FaultVect _vect;
217 static FaultStat _count;
218 public:
219 #if FULL_SYSTEM
220 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
221 : DtbFault(vaddr, reqFlags, flags)
222 { }
223 #endif
224 FaultName name() const {return _name;}
225 FaultVect vect() {return _vect;}
226 FaultStat & countStat() {return _count;}
227 };
228
229 class DtbAlignmentFault : public DtbFault
230 {
231 private:
232 static FaultName _name;
233 static FaultVect _vect;
234 static FaultStat _count;
235 public:
236 #if FULL_SYSTEM
237 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
238 : DtbFault(vaddr, reqFlags, flags)
239 { }
240 #endif
241 FaultName name() const {return _name;}
242 FaultVect vect() {return _vect;}
243 FaultStat & countStat() {return _count;}
244 };
245
246 class ItbFault : public AlphaFault
247 {
248 private:
249 Addr pc;
250 public:
251 ItbFault(Addr _pc)
252 : pc(_pc)
253 { }
254 FaultName name() const = 0;
255 FaultVect vect() = 0;
256 FaultStat & countStat() = 0;
257 #if FULL_SYSTEM
258 void invoke(ThreadContext * tc);
259 #endif
260 };
261
262 class ItbMissFault : public ItbFault
263 {
264 private:
265 static FaultName _name;
266 static FaultVect _vect;
267 static FaultStat _count;
268 public:
269 ItbMissFault(Addr pc)
270 : ItbFault(pc)
271 { }
272 FaultName name() const {return _name;}
273 FaultVect vect() {return _vect;}
274 FaultStat & countStat() {return _count;}
275 };
276
277 class ItbPageFault : public ItbFault
278 {
279 private:
280 static FaultName _name;
281 static FaultVect _vect;
282 static FaultStat _count;
283 public:
284 ItbPageFault(Addr pc)
285 : ItbFault(pc)
286 { }
287 FaultName name() const {return _name;}
288 FaultVect vect() {return _vect;}
289 FaultStat & countStat() {return _count;}
290 };
291
292 class ItbAcvFault : public ItbFault
293 {
294 private:
295 static FaultName _name;
296 static FaultVect _vect;
297 static FaultStat _count;
298 public:
299 ItbAcvFault(Addr pc)
300 : ItbFault(pc)
301 { }
302 FaultName name() const {return _name;}
303 FaultVect vect() {return _vect;}
304 FaultStat & countStat() {return _count;}
305 };
306
307 class UnimplementedOpcodeFault : public AlphaFault
308 {
309 private:
310 static FaultName _name;
311 static FaultVect _vect;
312 static FaultStat _count;
313 public:
314 FaultName name() const {return _name;}
315 FaultVect vect() {return _vect;}
316 FaultStat & countStat() {return _count;}
317 };
318
319 class FloatEnableFault : public AlphaFault
320 {
321 private:
322 static FaultName _name;
323 static FaultVect _vect;
324 static FaultStat _count;
325 public:
326 FaultName name() const {return _name;}
327 FaultVect vect() {return _vect;}
328 FaultStat & countStat() {return _count;}
329 };
330
331 class PalFault : public AlphaFault
332 {
333 protected:
334 bool skipFaultingInstruction() {return true;}
335 private:
336 static FaultName _name;
337 static FaultVect _vect;
338 static FaultStat _count;
339 public:
340 FaultName name() const {return _name;}
341 FaultVect vect() {return _vect;}
342 FaultStat & countStat() {return _count;}
343 };
344
345 class IntegerOverflowFault : public AlphaFault
346 {
347 private:
348 static FaultName _name;
349 static FaultVect _vect;
350 static FaultStat _count;
351 public:
352 FaultName name() const {return _name;}
353 FaultVect vect() {return _vect;}
354 FaultStat & countStat() {return _count;}
355 };
356
357 } // AlphaISA namespace
358
359 #endif // __FAULTS_HH__