Change ExecContext to ThreadContext. This is being renamed to differentiate between...
[gem5.git] / src / arch / alpha / faults.hh
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32 #ifndef __ALPHA_FAULTS_HH__
33 #define __ALPHA_FAULTS_HH__
34
35 #include "arch/alpha/isa_traits.hh"
36 #include "sim/faults.hh"
37
38 // The design of the "name" and "vect" functions is in sim/faults.hh
39
40 namespace AlphaISA
41 {
42
43 typedef const Addr FaultVect;
44
45 class AlphaFault : public FaultBase
46 {
47 protected:
48 virtual bool skipFaultingInstruction() {return false;}
49 virtual bool setRestartAddress() {return true;}
50 public:
51 #if FULL_SYSTEM
52 void invoke(ThreadContext * tc);
53 #endif
54 virtual FaultVect vect() = 0;
55 virtual FaultStat & countStat() = 0;
56 };
57
58 class MachineCheckFault : public AlphaFault
59 {
60 private:
61 static FaultName _name;
62 static FaultVect _vect;
63 static FaultStat _count;
64 public:
65 FaultName name() {return _name;}
66 FaultVect vect() {return _vect;}
67 FaultStat & countStat() {return _count;}
68 bool isMachineCheckFault() {return true;}
69 };
70
71 class AlignmentFault : public AlphaFault
72 {
73 private:
74 static FaultName _name;
75 static FaultVect _vect;
76 static FaultStat _count;
77 public:
78 FaultName name() {return _name;}
79 FaultVect vect() {return _vect;}
80 FaultStat & countStat() {return _count;}
81 bool isAlignmentFault() {return true;}
82 };
83
84 static inline Fault genMachineCheckFault()
85 {
86 return new MachineCheckFault;
87 }
88
89 static inline Fault genAlignmentFault()
90 {
91 return new AlignmentFault;
92 }
93
94 class ResetFault : public AlphaFault
95 {
96 private:
97 static FaultName _name;
98 static FaultVect _vect;
99 static FaultStat _count;
100 public:
101 FaultName name() {return _name;}
102 FaultVect vect() {return _vect;}
103 FaultStat & countStat() {return _count;}
104 };
105
106 class ArithmeticFault : public AlphaFault
107 {
108 protected:
109 bool skipFaultingInstruction() {return true;}
110 private:
111 static FaultName _name;
112 static FaultVect _vect;
113 static FaultStat _count;
114 public:
115 FaultName name() {return _name;}
116 FaultVect vect() {return _vect;}
117 FaultStat & countStat() {return _count;}
118 #if FULL_SYSTEM
119 void invoke(ThreadContext * tc);
120 #endif
121 };
122
123 class InterruptFault : public AlphaFault
124 {
125 protected:
126 bool setRestartAddress() {return false;}
127 private:
128 static FaultName _name;
129 static FaultVect _vect;
130 static FaultStat _count;
131 public:
132 FaultName name() {return _name;}
133 FaultVect vect() {return _vect;}
134 FaultStat & countStat() {return _count;}
135 };
136
137 class DtbFault : public AlphaFault
138 {
139 #if FULL_SYSTEM
140 private:
141 AlphaISA::VAddr vaddr;
142 uint32_t reqFlags;
143 uint64_t flags;
144 public:
145 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
146 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
147 { }
148 #endif
149 FaultName name() = 0;
150 FaultVect vect() = 0;
151 FaultStat & countStat() = 0;
152 #if FULL_SYSTEM
153 void invoke(ThreadContext * tc);
154 #endif
155 };
156
157 class NDtbMissFault : public DtbFault
158 {
159 private:
160 static FaultName _name;
161 static FaultVect _vect;
162 static FaultStat _count;
163 public:
164 #if FULL_SYSTEM
165 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
166 : DtbFault(vaddr, reqFlags, flags)
167 { }
168 #endif
169 FaultName name() {return _name;}
170 FaultVect vect() {return _vect;}
171 FaultStat & countStat() {return _count;}
172 };
173
174 class PDtbMissFault : public DtbFault
175 {
176 private:
177 static FaultName _name;
178 static FaultVect _vect;
179 static FaultStat _count;
180 public:
181 #if FULL_SYSTEM
182 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
183 : DtbFault(vaddr, reqFlags, flags)
184 { }
185 #endif
186 FaultName name() {return _name;}
187 FaultVect vect() {return _vect;}
188 FaultStat & countStat() {return _count;}
189 };
190
191 class DtbPageFault : public DtbFault
192 {
193 private:
194 static FaultName _name;
195 static FaultVect _vect;
196 static FaultStat _count;
197 public:
198 #if FULL_SYSTEM
199 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
200 : DtbFault(vaddr, reqFlags, flags)
201 { }
202 #endif
203 FaultName name() {return _name;}
204 FaultVect vect() {return _vect;}
205 FaultStat & countStat() {return _count;}
206 };
207
208 class DtbAcvFault : public DtbFault
209 {
210 private:
211 static FaultName _name;
212 static FaultVect _vect;
213 static FaultStat _count;
214 public:
215 #if FULL_SYSTEM
216 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
217 : DtbFault(vaddr, reqFlags, flags)
218 { }
219 #endif
220 FaultName name() {return _name;}
221 FaultVect vect() {return _vect;}
222 FaultStat & countStat() {return _count;}
223 };
224
225 class DtbAlignmentFault : public DtbFault
226 {
227 private:
228 static FaultName _name;
229 static FaultVect _vect;
230 static FaultStat _count;
231 public:
232 #if FULL_SYSTEM
233 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
234 : DtbFault(vaddr, reqFlags, flags)
235 { }
236 #endif
237 FaultName name() {return _name;}
238 FaultVect vect() {return _vect;}
239 FaultStat & countStat() {return _count;}
240 };
241
242 class ItbFault : public AlphaFault
243 {
244 private:
245 Addr pc;
246 public:
247 ItbFault(Addr _pc)
248 : pc(_pc)
249 { }
250 FaultName name() = 0;
251 FaultVect vect() = 0;
252 FaultStat & countStat() = 0;
253 #if FULL_SYSTEM
254 void invoke(ThreadContext * tc);
255 #endif
256 };
257
258 class ItbMissFault : public ItbFault
259 {
260 private:
261 static FaultName _name;
262 static FaultVect _vect;
263 static FaultStat _count;
264 public:
265 ItbMissFault(Addr pc)
266 : ItbFault(pc)
267 { }
268 FaultName name() {return _name;}
269 FaultVect vect() {return _vect;}
270 FaultStat & countStat() {return _count;}
271 };
272
273 class ItbPageFault : public ItbFault
274 {
275 private:
276 static FaultName _name;
277 static FaultVect _vect;
278 static FaultStat _count;
279 public:
280 ItbPageFault(Addr pc)
281 : ItbFault(pc)
282 { }
283 FaultName name() {return _name;}
284 FaultVect vect() {return _vect;}
285 FaultStat & countStat() {return _count;}
286 };
287
288 class ItbAcvFault : public ItbFault
289 {
290 private:
291 static FaultName _name;
292 static FaultVect _vect;
293 static FaultStat _count;
294 public:
295 ItbAcvFault(Addr pc)
296 : ItbFault(pc)
297 { }
298 FaultName name() {return _name;}
299 FaultVect vect() {return _vect;}
300 FaultStat & countStat() {return _count;}
301 };
302
303 class UnimplementedOpcodeFault : public AlphaFault
304 {
305 private:
306 static FaultName _name;
307 static FaultVect _vect;
308 static FaultStat _count;
309 public:
310 FaultName name() {return _name;}
311 FaultVect vect() {return _vect;}
312 FaultStat & countStat() {return _count;}
313 };
314
315 class FloatEnableFault : public AlphaFault
316 {
317 private:
318 static FaultName _name;
319 static FaultVect _vect;
320 static FaultStat _count;
321 public:
322 FaultName name() {return _name;}
323 FaultVect vect() {return _vect;}
324 FaultStat & countStat() {return _count;}
325 };
326
327 class PalFault : public AlphaFault
328 {
329 protected:
330 bool skipFaultingInstruction() {return true;}
331 private:
332 static FaultName _name;
333 static FaultVect _vect;
334 static FaultStat _count;
335 public:
336 FaultName name() {return _name;}
337 FaultVect vect() {return _vect;}
338 FaultStat & countStat() {return _count;}
339 };
340
341 class IntegerOverflowFault : public AlphaFault
342 {
343 private:
344 static FaultName _name;
345 static FaultVect _vect;
346 static FaultStat _count;
347 public:
348 FaultName name() {return _name;}
349 FaultVect vect() {return _vect;}
350 FaultStat & countStat() {return _count;}
351 };
352
353 } // AlphaISA namespace
354
355 #endif // __FAULTS_HH__