2 * Copyright (c) 2006 The Regents of The University of Michigan
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16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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28 * Authors: Steve Reinhardt
32 #ifndef __ARCH_ALPHA_INTERRUPT_HH__
33 #define __ARCH_ALPHA_INTERRUPT_HH__
35 #include "arch/alpha/faults.hh"
36 #include "arch/alpha/isa_traits.hh"
37 #include "cpu/thread_context.hh"
44 uint64_t interrupts[NumInterruptLevels];
50 memset(interrupts, 0, sizeof(interrupts));
54 void post(int int_num, int index)
56 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
58 if (int_num < 0 || int_num >= NumInterruptLevels)
59 panic("int_num out of bounds\n");
61 if (index < 0 || index >= sizeof(uint64_t) * 8)
62 panic("int_num out of bounds\n");
64 interrupts[int_num] |= 1 << index;
65 intstatus |= (ULL(1) << int_num);
68 void clear(int int_num, int index)
70 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
72 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
73 panic("int_num out of bounds\n");
75 if (index < 0 || index >= sizeof(uint64_t) * 8)
76 panic("int_num out of bounds\n");
78 interrupts[int_num] &= ~(1 << index);
79 if (interrupts[int_num] == 0)
80 intstatus &= ~(ULL(1) << int_num);
85 DPRINTF(Interrupt, "Interrupts all cleared\n");
87 memset(interrupts, 0, sizeof(interrupts));
91 void serialize(std::ostream &os)
93 SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
94 SERIALIZE_SCALAR(intstatus);
97 void unserialize(Checkpoint *cp, const std::string §ion)
99 UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
100 UNSERIALIZE_SCALAR(intstatus);
103 bool check_interrupts(ThreadContext * tc) const
105 return (intstatus != 0) && !(tc->readPC() & 0x3);
108 Fault getInterrupt(ThreadContext * tc)
113 if (tc->readMiscReg(IPR_ASTRR))
114 panic("asynchronous traps not implemented\n");
116 if (tc->readMiscReg(IPR_SIRR)) {
117 for (int i = INTLEVEL_SOFTWARE_MIN;
118 i < INTLEVEL_SOFTWARE_MAX; i++) {
119 if (tc->readMiscReg(IPR_SIRR) & (ULL(1) << i)) {
120 // See table 4-19 of 21164 hardware reference
121 ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1;
122 summary |= (ULL(1) << i);
127 uint64_t interrupts = intstatus;
129 for (int i = INTLEVEL_EXTERNAL_MIN;
130 i < INTLEVEL_EXTERNAL_MAX; i++) {
131 if (interrupts & (ULL(1) << i)) {
132 // See table 4-19 of 21164 hardware reference
134 summary |= (ULL(1) << i);
139 if (ipl && ipl > tc->readMiscReg(IPR_IPLR)) {
140 tc->setMiscReg(IPR_ISR, summary);
141 tc->setMiscReg(IPR_INTID, ipl);
143 /* The following needs to be added back in somehow */
144 // Checker needs to know these two registers were updated.
147 this->checker->threadBase()->setMiscReg(IPR_ISR, summary);
148 this->checker->threadBase()->setMiscReg(IPR_INTID, ipl);
152 DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
153 tc->readMiscReg(IPR_IPLR), ipl, summary);
155 return new InterruptFault;