2 * Copyright (c) 2006 The Regents of The University of Michigan
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16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Steve Reinhardt
32 #ifndef __ARCH_ALPHA_INTERRUPT_HH__
33 #define __ARCH_ALPHA_INTERRUPT_HH__
35 #include "arch/alpha/faults.hh"
36 #include "arch/alpha/isa_traits.hh"
37 #include "cpu/thread_context.hh"
44 uint64_t interrupts[NumInterruptLevels];
50 memset(interrupts, 0, sizeof(interrupts));
55 void post(int int_num, int index)
57 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
59 if (int_num < 0 || int_num >= NumInterruptLevels)
60 panic("int_num out of bounds\n");
62 if (index < 0 || index >= sizeof(uint64_t) * 8)
63 panic("int_num out of bounds\n");
65 interrupts[int_num] |= 1 << index;
66 intstatus |= (ULL(1) << int_num);
69 void clear(int int_num, int index)
71 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
73 if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
74 panic("int_num out of bounds\n");
76 if (index < 0 || index >= sizeof(uint64_t) * 8)
77 panic("int_num out of bounds\n");
79 interrupts[int_num] &= ~(1 << index);
80 if (interrupts[int_num] == 0)
81 intstatus &= ~(ULL(1) << int_num);
86 DPRINTF(Interrupt, "Interrupts all cleared\n");
88 memset(interrupts, 0, sizeof(interrupts));
92 void serialize(std::ostream &os)
94 SERIALIZE_ARRAY(interrupts, NumInterruptLevels);
95 SERIALIZE_SCALAR(intstatus);
98 void unserialize(Checkpoint *cp, const std::string §ion)
100 UNSERIALIZE_ARRAY(interrupts, NumInterruptLevels);
101 UNSERIALIZE_SCALAR(intstatus);
104 bool check_interrupts(ThreadContext * tc) const
106 return (intstatus != 0) && !(tc->readPC() & 0x3);
109 Fault getInterrupt(ThreadContext * tc)
114 if (tc->readMiscReg(IPR_ASTRR))
115 panic("asynchronous traps not implemented\n");
117 if (tc->readMiscReg(IPR_SIRR)) {
118 for (int i = INTLEVEL_SOFTWARE_MIN;
119 i < INTLEVEL_SOFTWARE_MAX; i++) {
120 if (tc->readMiscReg(IPR_SIRR) & (ULL(1) << i)) {
121 // See table 4-19 of 21164 hardware reference
122 ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1;
123 summary |= (ULL(1) << i);
128 uint64_t interrupts = intstatus;
130 for (int i = INTLEVEL_EXTERNAL_MIN;
131 i < INTLEVEL_EXTERNAL_MAX; i++) {
132 if (interrupts & (ULL(1) << i)) {
133 // See table 4-19 of 21164 hardware reference
135 summary |= (ULL(1) << i);
140 if (ipl && ipl > tc->readMiscReg(IPR_IPLR)) {
142 newSummary = summary;
144 DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
145 tc->readMiscReg(IPR_IPLR), ipl, summary);
147 return new InterruptFault;
153 void updateIntrInfo(ThreadContext *tc)
156 tc->setMiscReg(IPR_ISR, newSummary);
157 tc->setMiscReg(IPR_INTID, newIpl);