base: Delete alpha loader components.
[gem5.git] / src / arch / alpha / isa / opcdec.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2003-2005 The Regents of The University of Michigan
4 // All rights reserved.
5 //
6 // Redistribution and use in source and binary forms, with or without
7 // modification, are permitted provided that the following conditions are
8 // met: redistributions of source code must retain the above copyright
9 // notice, this list of conditions and the following disclaimer;
10 // redistributions in binary form must reproduce the above copyright
11 // notice, this list of conditions and the following disclaimer in the
12 // documentation and/or other materials provided with the distribution;
13 // neither the name of the copyright holders nor the names of its
14 // contributors may be used to endorse or promote products derived from
15 // this software without specific prior written permission.
16 //
17 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 //
29 // Authors: Kevin Lim
30
31 ////////////////////////////////////////////////////////////////////
32 //
33 // OPCDEC fault instructions
34 //
35
36 output header {{
37 /**
38 * Static instruction class for instructions that cause an OPCDEC fault
39 * when executed. This is currently only for PAL mode instructions
40 * executed in non-PAL mode.
41 */
42 class OpcdecFault : public AlphaStaticInst
43 {
44 public:
45 /// Constructor
46 OpcdecFault(ExtMachInst _machInst)
47 : AlphaStaticInst("opcdec fault", _machInst, No_OpClass)
48 {
49 }
50
51 Fault execute(ExecContext *, Trace::InstRecord *) const override;
52
53 std::string generateDisassembly(
54 Addr pc, const SymbolTable *symtab) const override;
55 };
56 }};
57
58 output decoder {{
59 std::string
60 OpcdecFault::generateDisassembly(Addr pc, const SymbolTable *symtab) const
61 {
62 return csprintf("%-10s (inst 0x%x, opcode 0x%x)",
63 " OPCDEC fault", machInst, OPCODE);
64 }
65 }};
66
67 output exec {{
68 Fault
69 OpcdecFault::execute(ExecContext *xc, Trace::InstRecord *traceData) const
70 {
71 return std::make_shared<UnimplementedOpcodeFault>();
72 }
73 }};
74
75 def format OpcdecFault() {{
76 decode_block = 'return new OpcdecFault(machInst);\n'
77 }};
78