src/arch/alpha/isa.cc

   1 /*
   2  * Copyright (c) 2009 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #include "arch/alpha/isa.hh"
  32 #include "cpu/thread_context.hh"
  33
  34 namespace AlphaISA
  35 {
  36
  37 void
  38 ISA::clear()
  39 {
  40     miscRegFile.clear();
  41 }
  42
  43 MiscReg
  44 ISA::readMiscRegNoEffect(int miscReg)
  45 {
  46     return miscRegFile.readRegNoEffect((MiscRegIndex)miscReg);
  47 }
  48
  49 MiscReg
  50 ISA::readMiscReg(int miscReg, ThreadContext *tc)
  51 {
  52     return miscRegFile.readReg((MiscRegIndex)miscReg, tc);
  53 }
  54
  55 void
  56 ISA::setMiscRegNoEffect(int miscReg, const MiscReg val)
  57 {
  58     miscRegFile.setRegNoEffect((MiscRegIndex)miscReg, val);
  59 }
  60
  61 void
  62 ISA::setMiscReg(int miscReg, const MiscReg val, ThreadContext *tc)
  63 {
  64     miscRegFile.setReg((MiscRegIndex)miscReg, val, tc);
  65 }
  66
  67 void
  68 ISA::serialize(std::ostream &os)
  69 {
  70     miscRegFile.serialize(os);
  71 }
  72
  73 void
  74 ISA::unserialize(Checkpoint *cp, const std::string &section)
  75 {
  76     miscRegFile.unserialize(cp, section);
  77 }
  78
  79 }