2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
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28 * Authors: Steve Reinhardt
32 #ifndef __ARCH_ALPHA_ISA_TRAITS_HH__
33 #define __ARCH_ALPHA_ISA_TRAITS_HH__
35 namespace LittleEndianGuest {}
37 #include "arch/alpha/types.hh"
38 #include "base/types.hh"
39 #include "config/full_system.hh"
45 using namespace LittleEndianGuest;
47 StaticInstPtr decodeInst(ExtMachInst);
49 // Alpha Does NOT have a delay slot
50 #define ISA_HAS_DELAY_SLOT 0
52 const Addr PageShift = 13;
53 const Addr PageBytes = ULL(1) << PageShift;
54 const Addr PageMask = ~(PageBytes - 1);
55 const Addr PageOffset = PageBytes - 1;
57 ////////////////////////////////////////////////////////////////////////
62 const Addr PteShift = 3;
63 const Addr NPtePageShift = PageShift - PteShift;
64 const Addr NPtePage = ULL(1) << NPtePageShift;
65 const Addr PteMask = NPtePage - 1;
68 const Addr USegBase = ULL(0x0);
69 const Addr USegEnd = ULL(0x000003ffffffffff);
71 // Kernel Direct Mapped
72 const Addr K0SegBase = ULL(0xfffffc0000000000);
73 const Addr K0SegEnd = ULL(0xfffffdffffffffff);
76 const Addr K1SegBase = ULL(0xfffffe0000000000);
77 const Addr K1SegEnd = ULL(0xffffffffffffffff);
79 ////////////////////////////////////////////////////////////////////////
85 INTLEVEL_SOFTWARE_MIN = 4,
86 INTLEVEL_SOFTWARE_MAX = 19,
88 INTLEVEL_EXTERNAL_MIN = 20,
89 INTLEVEL_EXTERNAL_MAX = 34,
93 INTINDEX_ETHERNET = 0,
100 NumInterruptLevels = INTLEVEL_EXTERNAL_MAX
106 mode_kernel = 0, // kernel
107 mode_executive = 1, // executive (unused by unix)
108 mode_supervisor = 2, // supervisor (unused by unix)
109 mode_user = 3, // user mode
110 mode_number // number of modes
113 // Constants Related to the number of registers
116 LogVMPageSize = 13, // 8K bytes
117 VMPageSize = (1 << LogVMPageSize),
119 BranchPredAddrShiftAmt = 2, // instructions are 4-byte aligned
127 // return a no-op instruction... used for instruction fetch faults
128 // Alpha UNOP (ldq_u r31,0(r0))
129 const ExtMachInst NoopMachInst = 0x2ffe0000;
131 // Memory accesses cannot be unaligned
132 const bool HasUnalignedMemAcc = false;
134 } // namespace AlphaISA
136 #endif // __ARCH_ALPHA_ISA_TRAITS_HH__