src/arch/alpha/predecoder.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #ifndef __ARCH_ALPHA_PREDECODER_HH__
  32 #define __ARCH_ALPHA_PREDECODER_HH__
  33
  34 #include "arch/alpha/types.hh"
  35 #include "base/misc.hh"
  36 #include "config/full_system.hh"
  37 #include "sim/host.hh"
  38
  39 class ThreadContext;
  40
  41 namespace AlphaISA {
  42
  43 class Predecoder
  44 {
  45   protected:
  46     ThreadContext *tc;
  47
  48     // The extended machine instruction being generated
  49     ExtMachInst ext_inst;
  50
  51   public:
  52     Predecoder(ThreadContext * _tc)
  53         : tc(_tc)
  54     {}
  55
  56     ThreadContext *
  57     getTC()
  58     {
  59         return tc;
  60     }
  61
  62     void
  63     setTC(ThreadContext * _tc)
  64     {
  65         tc = _tc;
  66     }
  67
  68     void
  69     process()
  70     { }
  71
  72     void
  73     reset()
  74     { }
  75
  76     // Use this to give data to the predecoder. This should be used
  77     // when there is control flow.
  78     void
  79     moreBytes(Addr pc, Addr fetchPC, MachInst inst)
  80     {
  81         ext_inst = inst;
  82 #if FULL_SYSTEM
  83         ext_inst |= (static_cast<ExtMachInst>(pc & 0x1) << 32);
  84 #endif
  85     }
  86
  87     bool
  88     needMoreBytes()
  89     {
  90         return true;
  91     }
  92
  93     bool
  94     extMachInstReady()
  95     {
  96         return true;
  97     }
  98
  99     // This returns a constant reference to the ExtMachInst to avoid a copy
 100     const ExtMachInst &
 101     getExtMachInst()
 102     {
 103         return ext_inst;
 104     }
 105 };
 106
 107 } // namespace AlphaISA
 108
 109 #endif // __ARCH_ALPHA_PREDECODER_HH__