src/arch/alpha/predecoder.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #ifndef __ARCH_ALPHA_PREDECODER_HH__
  32 #define __ARCH_ALPHA_PREDECODER_HH__
  33
  34 #include "arch/alpha/types.hh"
  35 #include "base/misc.hh"
  36 #include "config/full_system.hh"
  37 #include "sim/host.hh"
  38
  39 class ThreadContext;
  40
  41 namespace AlphaISA
  42 {
  43     class Predecoder
  44     {
  45       protected:
  46         ThreadContext * tc;
  47         //The pc of the current instruction
  48         Addr fetchPC;
  49         //The extended machine instruction being generated
  50         ExtMachInst ext_inst;
  51
  52       public:
  53         Predecoder(ThreadContext * _tc) : tc(_tc)
  54         {}
  55
  56         ThreadContext * getTC()
  57         {
  58             return tc;
  59         }
  60
  61         void setTC(ThreadContext * _tc)
  62         {
  63             tc = _tc;
  64         }
  65
  66         void process()
  67         {
  68         }
  69
  70         //Use this to give data to the predecoder. This should be used
  71         //when there is control flow.
  72         void moreBytes(Addr pc, Addr off, MachInst inst)
  73         {
  74             fetchPC = pc;
  75             assert(off == 0);
  76             ext_inst = inst;
  77 #if FULL_SYSTEM
  78             if (pc && 0x1)
  79                 ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32);
  80 #endif
  81         }
  82
  83         //Use this to give data to the predecoder. This should be used
  84         //when instructions are executed in order.
  85         void moreBytes(MachInst machInst)
  86         {
  87             moreBytes(fetchPC + sizeof(machInst), 0, machInst);
  88         }
  89
  90         bool needMoreBytes()
  91         {
  92             return true;
  93         }
  94
  95         bool extMachInstReady()
  96         {
  97             return true;
  98         }
  99
 100         //This returns a constant reference to the ExtMachInst to avoid a copy
 101         const ExtMachInst & getExtMachInst()
 102         {
 103             return ext_inst;
 104         }
 105     };
 106 };
 107
 108 #endif // __ARCH_ALPHA_PREDECODER_HH__