Merge with head.
[gem5.git] / src / arch / alpha / predecoder.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __ARCH_ALPHA_PREDECODER_HH__
32 #define __ARCH_ALPHA_PREDECODER_HH__
33
34 #include "arch/alpha/types.hh"
35 #include "base/misc.hh"
36 #include "config/full_system.hh"
37 #include "sim/host.hh"
38
39 class ThreadContext;
40
41 namespace AlphaISA
42 {
43 class Predecoder
44 {
45 protected:
46 ThreadContext * tc;
47 //The extended machine instruction being generated
48 ExtMachInst ext_inst;
49
50 public:
51 Predecoder(ThreadContext * _tc) : tc(_tc)
52 {}
53
54 ThreadContext * getTC()
55 {
56 return tc;
57 }
58
59 void setTC(ThreadContext * _tc)
60 {
61 tc = _tc;
62 }
63
64 void process()
65 {
66 }
67
68 void reset()
69 {}
70
71 //Use this to give data to the predecoder. This should be used
72 //when there is control flow.
73 void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
74 {
75 ext_inst = inst;
76 #if FULL_SYSTEM
77 if (pc && 0x1)
78 ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32);
79 #endif
80 }
81
82 bool needMoreBytes()
83 {
84 return true;
85 }
86
87 bool extMachInstReady()
88 {
89 return true;
90 }
91
92 //This returns a constant reference to the ExtMachInst to avoid a copy
93 const ExtMachInst & getExtMachInst()
94 {
95 return ext_inst;
96 }
97 };
98 };
99
100 #endif // __ARCH_ALPHA_PREDECODER_HH__