src/arch/alpha/predecoder.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #ifndef __ARCH_ALPHA_PREDECODER_HH__
  32 #define __ARCH_ALPHA_PREDECODER_HH__
  33
  34 #include "arch/alpha/types.hh"
  35 #include "base/misc.hh"
  36 #include "sim/host.hh"
  37
  38 class ThreadContext;
  39
  40 namespace AlphaISA
  41 {
  42     class Predecoder
  43     {
  44       protected:
  45         ThreadContext * tc;
  46         //The pc of the current instruction
  47         Addr fetchPC;
  48         //The extended machine instruction being generated
  49         ExtMachInst ext_inst;
  50
  51       public:
  52         Predecoder(ThreadContext * _tc) : tc(_tc)
  53         {}
  54
  55         ThreadContext * getTC()
  56         {
  57             return tc;
  58         }
  59
  60         void setTC(ThreadContext * _tc)
  61         {
  62             tc = _tc;
  63         }
  64
  65         void process()
  66         {
  67         }
  68
  69         //Use this to give data to the predecoder. This should be used
  70         //when there is control flow.
  71         void moreBytes(Addr pc, Addr off, MachInst inst)
  72         {
  73             fetchPC = pc;
  74             assert(off == 0);
  75             ext_inst = inst;
  76 #if FULL_SYSTEM
  77             if (pc && 0x1)
  78                 ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32);
  79 #endif
  80         }
  81
  82         //Use this to give data to the predecoder. This should be used
  83         //when instructions are executed in order.
  84         void moreBytes(MachInst machInst)
  85         {
  86             moreBytes(fetchPC + sizeof(machInst), 0, machInst);
  87         }
  88
  89         bool needMoreBytes()
  90         {
  91             return true;
  92         }
  93
  94         bool extMachInstReady()
  95         {
  96             return true;
  97         }
  98
  99         //This returns a constant reference to the ExtMachInst to avoid a copy
 100         const ExtMachInst & getExtMachInst()
 101         {
 102             return ext_inst;
 103         }
 104     };
 105 };
 106
 107 #endif // __ARCH_ALPHA_PREDECODER_HH__