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32 #include "arch/alpha/isa_traits.hh"
33 #include "arch/alpha/process.hh"
34 #include "base/loader/object_file.hh"
35 #include "base/loader/elf_object.hh"
36 #include "base/misc.hh"
37 #include "cpu/thread_context.hh"
38 #include "mem/page_table.hh"
39 #include "sim/process_impl.hh"
40 #include "sim/system.hh"
42 using namespace AlphaISA
;
45 AlphaLiveProcess::AlphaLiveProcess(LiveProcessParams
*params
,
47 : LiveProcess(params
, objFile
)
49 brk_point
= objFile
->dataBase() + objFile
->dataSize() + objFile
->bssSize();
50 brk_point
= roundUp(brk_point
, VMPageSize
);
52 // Set up stack. On Alpha, stack goes below text section. This
53 // code should get moved to some architecture-specific spot.
54 stack_base
= objFile
->textBase() - (409600+4096);
56 // Set up region for mmaps. Tru64 seems to start just above 0 and
57 // grow up from there.
58 mmap_start
= mmap_end
= 0x10000;
60 // Set pointer for next thread stack. Reserve 8M for main stack.
61 next_thread_stack_base
= stack_base
- (8 * 1024 * 1024);
66 AlphaLiveProcess::argsInit(int intSize
, int pageSize
)
68 objFile
->loadSections(initVirtMem
);
70 typedef AuxVector
<uint64_t> auxv_t
;
71 std::vector
<auxv_t
> auxv
;
73 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
76 // modern glibc uses a bunch of auxiliary vectors to set up
77 // TLS as well as do a bunch of other stuff
78 // these vectors go on the bottom of the stack, below argc/argv/envp
79 // pointers but above actual arg strings
80 // I don't have all the ones glibc looks at here, but so far it doesn't
81 // seem to be a problem.
82 // check out _dl_aux_init() in glibc/elf/dl-support.c for details
84 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, AlphaISA::VMPageSize
));
85 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 100));
86 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
87 DPRINTF(Loader
, "auxv at PHDR %08p\n", elfObject
->programHeaderTable());
88 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
89 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
90 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
91 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
92 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
93 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
97 // Calculate how much space we need for arg & env & auxv arrays.
98 int argv_array_size
= intSize
* (argv
.size() + 1);
99 int envp_array_size
= intSize
* (envp
.size() + 1);
100 int auxv_array_size
= intSize
* 2 * (auxv
.size() + 1);
102 int arg_data_size
= 0;
103 for (vector
<string
>::size_type i
= 0; i
< argv
.size(); ++i
) {
104 arg_data_size
+= argv
[i
].size() + 1;
106 int env_data_size
= 0;
107 for (vector
<string
>::size_type i
= 0; i
< envp
.size(); ++i
) {
108 env_data_size
+= envp
[i
].size() + 1;
118 if (space_needed
< 32*1024)
119 space_needed
= 32*1024;
121 // set bottom of stack
122 stack_min
= stack_base
- space_needed
;
124 stack_min
= roundDown(stack_min
, pageSize
);
125 stack_size
= stack_base
- stack_min
;
127 pTable
->allocate(stack_min
, roundUp(stack_size
, pageSize
));
129 // map out initial stack contents
130 Addr argv_array_base
= stack_min
+ intSize
; // room for argc
131 Addr envp_array_base
= argv_array_base
+ argv_array_size
;
132 Addr auxv_array_base
= envp_array_base
+ envp_array_size
;
133 Addr arg_data_base
= auxv_array_base
+ auxv_array_size
;
134 Addr env_data_base
= arg_data_base
+ arg_data_size
;
136 // write contents to stack
137 uint64_t argc
= argv
.size();
139 argc
= htog((uint64_t)argc
);
140 else if (intSize
== 4)
141 argc
= htog((uint32_t)argc
);
143 panic("Unknown int size");
145 initVirtMem
->writeBlob(stack_min
, (uint8_t*)&argc
, intSize
);
147 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
148 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
151 for (vector
<auxv_t
>::size_type x
= 0; x
< auxv
.size(); x
++) {
152 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
153 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
154 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
155 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
158 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
160 setSyscallArg(tc
, 0, argc
);
161 setSyscallArg(tc
, 1, argv_array_base
);
162 tc
->setIntReg(StackPointerReg
, stack_min
);
164 Addr prog_entry
= objFile
->entryPoint();
165 tc
->setPC(prog_entry
);
166 tc
->setNextPC(prog_entry
+ sizeof(MachInst
));
168 // MIPS/Sparc need NNPC for delay slot handling, while
169 // Alpha has no delay slots... However, CPU models
170 // cycle PCs by PC=NPC, NPC=NNPC, etc. so setting this
171 // here ensures CPU-Model Compatibility across board
172 tc
->setNextNPC(prog_entry
+ (2 * sizeof(MachInst
)));
176 AlphaLiveProcess::startup()
178 if (checkpointRestored
)
183 argsInit(MachineBytes
, VMPageSize
);
185 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
186 tc
->setIntReg(GlobalPointerReg
, objFile
->globalPointer());
187 //Operate in user mode
188 tc
->setMiscRegNoEffect(IPR_ICM
, 0x18);
189 //No super page mapping
190 tc
->setMiscRegNoEffect(IPR_MCSR
, 0);
191 //Set this to 0 for now, but it should be unique for each process
192 tc
->setMiscRegNoEffect(IPR_DTB_ASN
, M5_pid
<< 57);
196 AlphaLiveProcess::getSyscallArg(ThreadContext
*tc
, int i
)
199 return tc
->readIntReg(FirstArgumentReg
+ i
);
203 AlphaLiveProcess::setSyscallArg(ThreadContext
*tc
,
204 int i
, AlphaISA::IntReg val
)
207 tc
->setIntReg(FirstArgumentReg
+ i
, val
);
211 AlphaLiveProcess::setSyscallReturn(ThreadContext
*tc
,
212 SyscallReturn return_value
)
214 // check for error condition. Alpha syscall convention is to
215 // indicate success/failure in reg a3 (r19) and put the
216 // return value itself in the standard return value reg (v0).
217 if (return_value
.successful()) {
219 tc
->setIntReg(SyscallSuccessReg
, 0);
220 tc
->setIntReg(ReturnValueReg
, return_value
.value());
222 // got an error, return details
223 tc
->setIntReg(SyscallSuccessReg
, (IntReg
)-1);
224 tc
->setIntReg(ReturnValueReg
, -return_value
.value());