src/arch/alpha/regfile.cc

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Gabe Black
  30  *          Kevin Lim
  31  */
  32
  33 #include "arch/alpha/regfile.hh"
  34 #include "cpu/thread_context.hh"
  35
  36 using namespace std;
  37
  38 namespace AlphaISA {
  39
  40 void
  41 RegFile::serialize(EventManager *em, ostream &os)
  42 {
  43     intRegFile.serialize(os);
  44     floatRegFile.serialize(os);
  45     miscRegFile.serialize(os);
  46     SERIALIZE_SCALAR(pc);
  47     SERIALIZE_SCALAR(npc);
  48 #if FULL_SYSTEM
  49     SERIALIZE_SCALAR(intrflag);
  50 #endif
  51 }
  52
  53 void
  54 RegFile::unserialize(EventManager *em, Checkpoint *cp, const string &section)
  55 {
  56     intRegFile.unserialize(cp, section);
  57     floatRegFile.unserialize(cp, section);
  58     miscRegFile.unserialize(cp, section);
  59     UNSERIALIZE_SCALAR(pc);
  60     UNSERIALIZE_SCALAR(npc);
  61 #if FULL_SYSTEM
  62     UNSERIALIZE_SCALAR(intrflag);
  63 #endif
  64 }
  65
  66 void
  67 copyRegs(ThreadContext *src, ThreadContext *dest)
  68 {
  69     // First loop through the integer registers.
  70     for (int i = 0; i < NumIntRegs; ++i)
  71         dest->setIntReg(i, src->readIntReg(i));
  72
  73     // Then loop through the floating point registers.
  74     for (int i = 0; i < NumFloatRegs; ++i)
  75         dest->setFloatRegBits(i, src->readFloatRegBits(i));
  76
  77     // Copy misc. registers
  78     copyMiscRegs(src, dest);
  79
  80     // Lastly copy PC/NPC
  81     dest->setPC(src->readPC());
  82     dest->setNextPC(src->readNextPC());
  83 }
  84
  85 void
  86 copyMiscRegs(ThreadContext *src, ThreadContext *dest)
  87 {
  88     dest->setMiscRegNoEffect(MISCREG_FPCR,
  89         src->readMiscRegNoEffect(MISCREG_FPCR));
  90     dest->setMiscRegNoEffect(MISCREG_UNIQ,
  91         src->readMiscRegNoEffect(MISCREG_UNIQ));
  92     dest->setMiscRegNoEffect(MISCREG_LOCKFLAG,
  93         src->readMiscRegNoEffect(MISCREG_LOCKFLAG));
  94     dest->setMiscRegNoEffect(MISCREG_LOCKADDR,
  95         src->readMiscRegNoEffect(MISCREG_LOCKADDR));
  96
  97     copyIprs(src, dest);
  98 }
  99
 100 } // namespace AlphaISA