src/arch/alpha/regfile.hh

   1 /*
   2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Gabe Black
  29  */
  30
  31 #ifndef __ARCH_ALPHA_REGFILE_HH__
  32 #define __ARCH_ALPHA_REGFILE_HH__
  33
  34 #include "arch/alpha/isa_traits.hh"
  35 #include "arch/alpha/intregfile.hh"
  36 #include "arch/alpha/miscregfile.hh"
  37 #include "arch/alpha/types.hh"
  38 #include "sim/faults.hh"
  39
  40 #include <string>
  41
  42 //XXX These should be implemented by someone who knows the alpha stuff better
  43
  44 class Checkpoint;
  45 class ThreadContext;
  46
  47 namespace AlphaISA
  48 {
  49
  50     static inline std::string getIntRegName(RegIndex)
  51     {
  52         return "";
  53     }
  54
  55     static inline std::string getFloatRegName(RegIndex)
  56     {
  57         return "";
  58     }
  59
  60     static inline std::string getMiscRegName(RegIndex)
  61     {
  62         return "";
  63     }
  64
  65     class FloatRegFile
  66     {
  67       public:
  68
  69         union {
  70             uint64_t q[NumFloatRegs];   // integer qword view
  71             double d[NumFloatRegs];     // double-precision floating point view
  72         };
  73
  74         void serialize(std::ostream &os);
  75
  76         void unserialize(Checkpoint *cp, const std::string &section);
  77
  78         void clear()
  79         { bzero(d, sizeof(d)); }
  80     };
  81
  82     class RegFile {
  83
  84       protected:
  85         Addr pc;                        // program counter
  86         Addr npc;                       // next-cycle program counter
  87         Addr nnpc;
  88
  89       public:
  90         Addr readPC()
  91         {
  92             return pc;
  93         }
  94
  95         void setPC(Addr val)
  96         {
  97             pc = val;
  98         }
  99
 100         Addr readNextPC()
 101         {
 102             return npc;
 103         }
 104
 105         void setNextPC(Addr val)
 106         {
 107             npc = val;
 108         }
 109
 110         Addr readNextNPC()
 111         {
 112             return nnpc;
 113         }
 114
 115         void setNextNPC(Addr val)
 116         {
 117             nnpc = val;
 118         }
 119
 120       protected:
 121         IntRegFile intRegFile;          // (signed) integer register file
 122         FloatRegFile floatRegFile;      // floating point register file
 123         MiscRegFile miscRegFile;        // control register file
 124
 125       public:
 126
 127 #if FULL_SYSTEM
 128         int intrflag;                   // interrupt flag
 129         inline int instAsid()
 130         { return miscRegFile.getInstAsid(); }
 131         inline int dataAsid()
 132         { return miscRegFile.getDataAsid(); }
 133 #endif // FULL_SYSTEM
 134
 135         void clear()
 136         {
 137             intRegFile.clear();
 138             floatRegFile.clear();
 139             miscRegFile.clear();
 140         }
 141
 142         MiscReg readMiscReg(int miscReg)
 143         {
 144             return miscRegFile.readReg(miscReg);
 145         }
 146
 147         MiscReg readMiscRegWithEffect(int miscReg, ThreadContext *tc)
 148         {
 149             return miscRegFile.readRegWithEffect(miscReg, tc);
 150         }
 151
 152         void setMiscReg(int miscReg, const MiscReg &val)
 153         {
 154             miscRegFile.setReg(miscReg, val);
 155         }
 156
 157         void setMiscRegWithEffect(int miscReg, const MiscReg &val,
 158                 ThreadContext * tc)
 159         {
 160             miscRegFile.setRegWithEffect(miscReg, val, tc);
 161         }
 162
 163         FloatReg readFloatReg(int floatReg)
 164         {
 165             return floatRegFile.d[floatReg];
 166         }
 167
 168         FloatReg readFloatReg(int floatReg, int width)
 169         {
 170             return readFloatReg(floatReg);
 171         }
 172
 173         FloatRegBits readFloatRegBits(int floatReg)
 174         {
 175             return floatRegFile.q[floatReg];
 176         }
 177
 178         FloatRegBits readFloatRegBits(int floatReg, int width)
 179         {
 180             return readFloatRegBits(floatReg);
 181         }
 182
 183         void setFloatReg(int floatReg, const FloatReg &val)
 184         {
 185             floatRegFile.d[floatReg] = val;
 186         }
 187
 188         void setFloatReg(int floatReg, const FloatReg &val, int width)
 189         {
 190             setFloatReg(floatReg, val);
 191         }
 192
 193         void setFloatRegBits(int floatReg, const FloatRegBits &val)
 194         {
 195             floatRegFile.q[floatReg] = val;
 196         }
 197
 198         void setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
 199         {
 200             setFloatRegBits(floatReg, val);
 201         }
 202
 203         IntReg readIntReg(int intReg)
 204         {
 205             return intRegFile.readReg(intReg);
 206         }
 207
 208         void setIntReg(int intReg, const IntReg &val)
 209         {
 210             intRegFile.setReg(intReg, val);
 211         }
 212
 213         void serialize(std::ostream &os);
 214         void unserialize(Checkpoint *cp, const std::string &section);
 215
 216         void changeContext(RegContextParam param, RegContextVal val)
 217         {
 218             //This would be an alternative place to call/implement
 219             //the swapPALShadow function
 220         }
 221     };
 222
 223     void copyRegs(ThreadContext *src, ThreadContext *dest);
 224
 225     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
 226 } // namespace AlphaISA
 227
 228 #endif