X86: Define a noop ExtMachInst.
[gem5.git] / src / arch / alpha / registers.hh
1 /*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __ARCH_ALPHA_REGISTERS_HH__
32 #define __ARCH_ALPHA_REGISTERS_HH__
33
34 #include "arch/alpha/ipr.hh"
35 #include "arch/alpha/max_inst_regs.hh"
36 #include "base/types.hh"
37
38 namespace AlphaISA {
39
40 using AlphaISAInst::MaxInstSrcRegs;
41 using AlphaISAInst::MaxInstDestRegs;
42
43 typedef uint8_t RegIndex;
44 typedef uint64_t IntReg;
45
46 // floating point register file entry type
47 typedef double FloatReg;
48 typedef uint64_t FloatRegBits;
49
50 // control register file contents
51 typedef uint64_t MiscReg;
52
53 union AnyReg
54 {
55 IntReg intreg;
56 FloatReg fpreg;
57 MiscReg ctrlreg;
58 };
59
60 enum MiscRegIndex
61 {
62 MISCREG_FPCR = NumInternalProcRegs,
63 MISCREG_UNIQ,
64 MISCREG_LOCKFLAG,
65 MISCREG_LOCKADDR,
66 MISCREG_INTR
67 };
68
69 // semantically meaningful register indices
70 const RegIndex ZeroReg = 31; // architecturally meaningful
71 // the rest of these depend on the ABI
72 const RegIndex StackPointerReg = 30;
73 const RegIndex GlobalPointerReg = 29;
74 const RegIndex ProcedureValueReg = 27;
75 const RegIndex ReturnAddressReg = 26;
76 const RegIndex ReturnValueReg = 0;
77 const RegIndex FramePointerReg = 15;
78
79 const RegIndex SyscallNumReg = 0;
80 const RegIndex FirstArgumentReg = 16;
81 const RegIndex SyscallPseudoReturnReg = 20;
82 const RegIndex SyscallSuccessReg = 19;
83
84 const int NumIntArchRegs = 32;
85 const int NumPALShadowRegs = 8;
86 const int NumFloatArchRegs = 32;
87 // @todo: Figure out what this number really should be.
88 const int NumMiscArchRegs = 77;
89
90 const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs;
91 const int NumFloatRegs = NumFloatArchRegs;
92 const int NumMiscRegs = NumMiscArchRegs;
93
94 const int TotalNumRegs =
95 NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs;
96
97 const int TotalDataRegs = NumIntRegs + NumFloatRegs;
98
99 // These enumerate all the registers for dependence tracking.
100 enum DependenceTags {
101 // 0..31 are the integer regs 0..31
102 // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
103 FP_Base_DepTag = 40,
104 Ctrl_Base_DepTag = 72
105 };
106
107 } // namespace AlphaISA
108
109 #endif // __ARCH_ALPHA_REGFILE_HH__