src/arch/arm/ArmSystem.py

   1 # Copyright (c) 2009, 2012-2013, 2015-2017 ARM Limited
   2 # All rights reserved.
   3 #
   4 # The license below extends only to copyright in the software and shall
   5 # not be construed as granting a license to any other intellectual
   6 # property including but not limited to intellectual property relating
   7 # to a hardware implementation of the functionality of the software
   8 # licensed hereunder.  You may use the software subject to the license
   9 # terms below provided that you ensure that this notice is replicated
  10 # unmodified and in its entirety in all distributions of the software,
  11 # modified or unmodified, in source code or in binary form.
  12 #
  13 # Redistribution and use in source and binary forms, with or without
  14 # modification, are permitted provided that the following conditions are
  15 # met: redistributions of source code must retain the above copyright
  16 # notice, this list of conditions and the following disclaimer;
  17 # redistributions in binary form must reproduce the above copyright
  18 # notice, this list of conditions and the following disclaimer in the
  19 # documentation and/or other materials provided with the distribution;
  20 # neither the name of the copyright holders nor the names of its
  21 # contributors may be used to endorse or promote products derived from
  22 # this software without specific prior written permission.
  23 #
  24 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35 #
  36 # Authors: Ali Saidi
  37
  38 from m5.params import *
  39 from m5.SimObject import *
  40
  41 from System import System
  42
  43 class ArmMachineType(Enum):
  44     map = {
  45         'RealViewEB' : 827,
  46         'RealViewPBX' : 1901,
  47         'VExpress_EMM' : 2272,
  48         'VExpress_EMM64' : 2272,
  49         'DTOnly' : -1,
  50     }
  51
  52 class ArmSystem(System):
  53     type = 'ArmSystem'
  54     cxx_header = "arch/arm/system.hh"
  55     multi_proc = Param.Bool(True, "Multiprocessor system?")
  56     boot_loader = VectorParam.String([],
  57         "File that contains the boot loader code. Zero or more files may be "
  58         "specified. The first boot loader that matches the kernel's "
  59         "architecture will be used.")
  60     gic_cpu_addr = Param.Addr(0, "Addres of the GIC CPU interface")
  61     flags_addr = Param.Addr(0, "Address of the flags register for MP booting")
  62     have_security = Param.Bool(False,
  63         "True if Security Extensions are implemented")
  64     have_virtualization = Param.Bool(False,
  65         "True if Virtualization Extensions are implemented")
  66     have_lpae = Param.Bool(True, "True if LPAE is implemented")
  67     highest_el_is_64 = Param.Bool(False,
  68         "True if the register width of the highest implemented exception level "
  69         "is 64 bits (ARMv8)")
  70     reset_addr_64 = Param.Addr(0x0,
  71         "Reset address if the highest implemented exception level is 64 bits "
  72         "(ARMv8)")
  73     phys_addr_range_64 = Param.UInt8(40,
  74         "Supported physical address range in bits when using AArch64 (ARMv8)")
  75     have_large_asid_64 = Param.Bool(False,
  76         "True if ASID is 16 bits in AArch64 (ARMv8)")
  77
  78     m5ops_base = Param.Addr(0,
  79         "Base of the 64KiB PA range used for memory-mapped m5ops. Set to 0 "
  80         "to disable.")
  81
  82 class GenericArmSystem(ArmSystem):
  83     type = 'GenericArmSystem'
  84     cxx_header = "arch/arm/system.hh"
  85     machine_type = Param.ArmMachineType('DTOnly',
  86         "Machine id from http://www.arm.linux.org.uk/developer/machines/")
  87     atags_addr = Param.Addr("Address where default atags structure should " \
  88                                 "be written")
  89     dtb_filename = Param.String("",
  90         "File that contains the Device Tree Blob. Don't use DTB if empty.")
  91     early_kernel_symbols = Param.Bool(False,
  92         "enable early kernel symbol tables before MMU")
  93     enable_context_switch_stats_dump = Param.Bool(False, "enable stats/task info dumping at context switch boundaries")
  94
  95     panic_on_panic = Param.Bool(False, "Trigger a gem5 panic if the " \
  96                                     "guest kernel panics")
  97     panic_on_oops = Param.Bool(False, "Trigger a gem5 panic if the " \
  98                                    "guest kernel oopses")
  99
 100 class LinuxArmSystem(GenericArmSystem):
 101     type = 'LinuxArmSystem'
 102     cxx_header = "arch/arm/linux/system.hh"
 103
 104     @cxxMethod
 105     def dumpDmesg(self):
 106         """Dump dmesg from the simulated kernel to standard out"""
 107         pass
 108
 109     # Have Linux systems for ARM auto-calc their load_addr_mask for proper
 110     # kernel relocation.
 111     load_addr_mask = 0x0
 112
 113 class FreebsdArmSystem(GenericArmSystem):
 114     type = 'FreebsdArmSystem'
 115     cxx_header = "arch/arm/freebsd/system.hh"