Merge ARM into the head. ARM will compile but may not actually work.
[gem5.git] / src / arch / arm / ArmTLB.py
1 # -*- mode:python -*-
2
3 # Copyright (c) 2007-2008 The Florida State University
4 # All rights reserved.
5 #
6 # Redistribution and use in source and binary forms, with or without
7 # modification, are permitted provided that the following conditions are
8 # met: redistributions of source code must retain the above copyright
9 # notice, this list of conditions and the following disclaimer;
10 # redistributions in binary form must reproduce the above copyright
11 # notice, this list of conditions and the following disclaimer in the
12 # documentation and/or other materials provided with the distribution;
13 # neither the name of the copyright holders nor the names of its
14 # contributors may be used to endorse or promote products derived from
15 # this software without specific prior written permission.
16 #
17 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #
29 # Authors: Stephen Hines
30
31 from m5.SimObject import SimObject
32 from m5.params import *
33
34 class ArmTLB(SimObject):
35 abstract = True
36 type = 'ArmTLB'
37 cxx_class = 'ArmISA::TLB'
38 size = Param.Int("TLB size")
39
40 class ArmDTB(ArmTLB):
41 type = 'ArmDTB'
42 cxx_class = 'ArmISA::DTB'
43 size = 64
44
45 class ArmITB(ArmTLB):
46 type = 'ArmITB'
47 cxx_class = 'ArmISA::ITB'
48 size = 64
49
50 class ArmUTB(ArmTLB):
51 type = 'ArmUTB'
52 cxx_class = 'ArmISA::UTB'
53 size = 64
54