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31 #include "arch/arm/decoder.hh"
32 #include "arch/arm/isa_traits.hh"
33 #include "arch/arm/utility.hh"
34 #include "base/trace.hh"
35 #include "cpu/thread_context.hh"
36 #include "debug/Decoder.hh"
41 GenericISA::BasicDecodeCache
Decoder::defaultCache
;
46 // emi is typically ready, with some caveats below...
51 emi
.sevenAndFour
= bits(data
, 7) && bits(data
, 4);
52 emi
.isMisc
= (bits(data
, 24, 23) == 0x2 &&
55 DPRINTF(Decoder
, "Arm inst: %#x.\n", (uint64_t)emi
);
57 uint16_t word
= (data
>> (offset
* 8));
59 // A 32 bit thumb inst is half collected.
60 emi
.instBits
= emi
.instBits
| word
;
63 DPRINTF(Decoder
, "Second half of 32 bit Thumb: %#x.\n",
66 uint16_t highBits
= word
& 0xF800;
67 if (highBits
== 0xE800 || highBits
== 0xF000 ||
69 // The start of a 32 bit thumb inst.
72 // We've got the whole thing.
73 emi
.instBits
= (data
>> 16) | (data
<< 16);
74 DPRINTF(Decoder
, "All of 32 bit Thumb: %#x.\n",
78 // We only have the first half word.
80 "First half of 32 bit Thumb.\n");
81 emi
.instBits
= (uint32_t)word
<< 16;
88 // A 16 bit thumb inst.
91 // Set the condition code field artificially.
92 emi
.condCode
= COND_UC
;
93 DPRINTF(Decoder
, "16 bit Thumb: %#x.\n",
95 if (bits(word
, 15, 8) == 0xbf &&
96 bits(word
, 3, 0) != 0x0) {
98 itBits
= bits(word
, 7, 0);
100 "IT detected, cond = %#x, mask = %#x\n",
101 itBits
.cond
, itBits
.mask
);
108 //Use this to give data to the decoder. This should be used
109 //when there is control flow.
111 Decoder::moreBytes(const PCState
&pc
, Addr fetchPC
, MachInst inst
)
114 offset
= (fetchPC
>= pc
.instAddr()) ? 0 : pc
.instAddr() - fetchPC
;
115 emi
.thumb
= pc
.thumb();
116 emi
.fpscrLen
= fpscrLen
;
117 emi
.fpscrStride
= fpscrStride
;