src/arch/arm/decoder.hh

   1 /*
   2  * Copyright (c) 2013-2014 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2012 Google
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  33  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 #ifndef __ARCH_ARM_DECODER_HH__
  42 #define __ARCH_ARM_DECODER_HH__
  43
  44 #include <cassert>
  45
  46 #include "arch/arm/miscregs.hh"
  47 #include "arch/arm/types.hh"
  48 #include "arch/generic/decode_cache.hh"
  49 #include "arch/generic/decoder.hh"
  50 #include "base/types.hh"
  51 #include "cpu/static_inst.hh"
  52 #include "enums/DecoderFlavor.hh"
  53
  54 namespace ArmISA
  55 {
  56
  57 class ISA;
  58 class Decoder : public InstDecoder
  59 {
  60   protected:
  61     //The extended machine instruction being generated
  62     ExtMachInst emi;
  63     MachInst data;
  64     bool bigThumb;
  65     bool instDone;
  66     bool outOfBytes;
  67     int offset;
  68     bool foundIt;
  69     ITSTATE itBits;
  70
  71     int fpscrLen;
  72     int fpscrStride;
  73
  74     /**
  75      * SVE vector length, encoded in the same format as the ZCR_EL<x>.LEN
  76      * bitfields.
  77      */
  78     int sveLen;
  79
  80     Enums::DecoderFlavor decoderFlavor;
  81
  82     /// A cache of decoded instruction objects.
  83     static GenericISA::BasicDecodeCache defaultCache;
  84
  85     /**
  86      * Pre-decode an instruction from the current state of the
  87      * decoder.
  88      */
  89     void process();
  90
  91     /**
  92      * Consume bytes by moving the offset into the data word and
  93      * sanity check the results.
  94      */
  95     void consumeBytes(int numBytes);
  96
  97   public: // Decoder API
  98     Decoder(ISA* isa = nullptr);
  99
 100     /** Reset the decoders internal state. */
 101     void reset();
 102
 103     /**
 104      * Can the decoder accept more data?
 105      *
 106      * A CPU model uses this method to determine if the decoder can
 107      * accept more data. Note that an instruction can be ready (see
 108      * instReady() even if this method returns true.
 109      */
 110     bool needMoreBytes() const { return outOfBytes; }
 111
 112     /**
 113      * Is an instruction ready to be decoded?
 114      *
 115      * CPU models call this method to determine if decode() will
 116      * return a new instruction on the next call. It typically only
 117      * returns false if the decoder hasn't received enough data to
 118      * decode a full instruction.
 119      */
 120     bool instReady() const { return instDone; }
 121
 122     /**
 123      * Feed data to the decoder.
 124      *
 125      * A CPU model uses this interface to load instruction data into
 126      * the decoder. Once enough data has been loaded (check with
 127      * instReady()), a decoded instruction can be retrieved using
 128      * decode(ArmISA::PCState).
 129      *
 130      * This method is intended to support both fixed-length and
 131      * variable-length instructions. Instruction data is fetch in
 132      * MachInst blocks (which correspond to the size of a typical
 133      * insturction). The method might need to be called multiple times
 134      * if the instruction spans multiple blocks, in that case
 135      * needMoreBytes() will return true and instReady() will return
 136      * false.
 137      *
 138      * The fetchPC parameter is used to indicate where in memory the
 139      * instruction was fetched from. This is should be the same
 140      * address as the pc. If fetching multiple blocks, it indicates
 141      * where subsequent blocks are fetched from (pc + n *
 142      * sizeof(MachInst)).
 143      *
 144      * @param pc Instruction pointer that we are decoding.
 145      * @param fetchPC The address this chunk was fetched from.
 146      * @param inst Raw instruction data.
 147      */
 148     void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
 149
 150     /**
 151      * Decode an instruction or fetch it from the code cache.
 152      *
 153      * This method decodes the currently pending pre-decoded
 154      * instruction. Data must be fed to the decoder using moreBytes()
 155      * until instReady() is true before calling this method.
 156      *
 157      * @param pc Instruction pointer that we are decoding.
 158      * @return A pointer to a static instruction or NULL if the
 159      * decoder isn't ready (see instReady()).
 160      */
 161     StaticInstPtr decode(ArmISA::PCState &pc);
 162
 163     /**
 164      * Decode a pre-decoded machine instruction.
 165      *
 166      * @warn This method takes a pre-decoded instruction as its
 167      * argument. It should typically not be called directly.
 168      *
 169      * @param mach_inst A pre-decoded instruction
 170      * @retval A pointer to the corresponding StaticInst object.
 171      */
 172     StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
 173     {
 174         return defaultCache.decode(this, mach_inst, addr);
 175     }
 176
 177     /**
 178      * Decode a machine instruction without calling the cache.
 179      *
 180      * @note The implementation of this method is generated by the ISA
 181      * parser script.
 182      *
 183      * @warn This method takes a pre-decoded instruction as its
 184      * argument. It should typically not be called directly.
 185      *
 186      * @param mach_inst The binary instruction to decode.
 187      * @retval A pointer to the corresponding StaticInst object.
 188      */
 189     StaticInstPtr decodeInst(ExtMachInst mach_inst);
 190
 191     /**
 192      * Take over the state from an old decoder when switching CPUs.
 193      *
 194      * @param old Decoder used in old CPU
 195      */
 196     void takeOverFrom(Decoder *old) {}
 197
 198
 199   public: // ARM-specific decoder state manipulation
 200     void setContext(FPSCR fpscr)
 201     {
 202         fpscrLen = fpscr.len;
 203         fpscrStride = fpscr.stride;
 204     }
 205
 206     void setSveLen(uint8_t len)
 207     {
 208         sveLen = len;
 209     }
 210 };
 211
 212 } // namespace ArmISA
 213
 214 #endif // __ARCH_ARM_DECODER_HH__