src/arch/arm/fastmodel/CortexA76/evs.hh

   1 /*
   2  * Copyright 2019 Google, Inc.
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  12  * contributors may be used to endorse or promote products derived from
  13  * this software without specific prior written permission.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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  25  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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  27
  28 #ifndef __ARCH_ARM_FASTMODEL_CORTEXA76_EVS_HH__
  29 #define __ARCH_ARM_FASTMODEL_CORTEXA76_EVS_HH__
  30
  31 #include <memory>
  32
  33 #include "arch/arm/fastmodel/amba_ports.hh"
  34 #include "arch/arm/fastmodel/common/signal_receiver.hh"
  35 #include "arch/arm/fastmodel/protocol/exported_clock_rate_control.hh"
  36 #include "mem/port_proxy.hh"
  37 #include "params/FastModelScxEvsCortexA76x1.hh"
  38 #include "params/FastModelScxEvsCortexA76x2.hh"
  39 #include "params/FastModelScxEvsCortexA76x3.hh"
  40 #include "params/FastModelScxEvsCortexA76x4.hh"
  41 #include "scx_evs_CortexA76x1.h"
  42 #include "scx_evs_CortexA76x2.h"
  43 #include "scx_evs_CortexA76x3.h"
  44 #include "scx_evs_CortexA76x4.h"
  45 #include "systemc/ext/core/sc_event.hh"
  46 #include "systemc/ext/core/sc_module.hh"
  47 #include "systemc/tlm_port_wrapper.hh"
  48
  49 namespace FastModel
  50 {
  51
  52 class CortexA76Cluster;
  53
  54 template <class Types>
  55 class ScxEvsCortexA76 : public Types::Base
  56 {
  57   private:
  58     static const int CoreCount = Types::CoreCount;
  59     using Base = typename Types::Base;
  60     using Params = typename Types::Params;
  61
  62     SC_HAS_PROCESS(ScxEvsCortexA76);
  63
  64     ClockRateControlInitiatorSocket clockRateControl;
  65
  66     typedef sc_gem5::TlmTargetBaseWrapper<
  67         64, svp_gicv3_comms::gicv3_comms_fw_if,
  68         svp_gicv3_comms::gicv3_comms_bw_if, 1,
  69         sc_core::SC_ONE_OR_MORE_BOUND> TlmGicTarget;
  70
  71     AmbaInitiator amba;
  72     std::vector<std::unique_ptr<TlmGicTarget>> redist;
  73
  74     std::vector<std::unique_ptr<SignalReceiver>> cnthpirq;
  75     std::vector<std::unique_ptr<SignalReceiver>> cnthvirq;
  76     std::vector<std::unique_ptr<SignalReceiver>> cntpsirq;
  77     std::vector<std::unique_ptr<SignalReceiver>> cntvirq;
  78     std::vector<std::unique_ptr<SignalReceiver>> commirq;
  79     std::vector<std::unique_ptr<SignalReceiver>> ctidbgirq;
  80     std::vector<std::unique_ptr<SignalReceiver>> pmuirq;
  81     std::vector<std::unique_ptr<SignalReceiver>> vcpumntirq;
  82     std::vector<std::unique_ptr<SignalReceiver>> cntpnsirq;
  83
  84     sc_core::sc_event clockChanged;
  85     sc_core::sc_attribute<Tick> clockPeriod;
  86     sc_core::sc_attribute<CortexA76Cluster *> gem5CpuCluster;
  87     sc_core::sc_attribute<PortProxy::SendFunctionalFunc> sendFunctional;
  88
  89     void sendFunc(PacketPtr pkt);
  90
  91     void clockChangeHandler();
  92
  93     const Params &params;
  94
  95   public:
  96     ScxEvsCortexA76(const Params &p) : ScxEvsCortexA76(p.name.c_str(), p) {}
  97     ScxEvsCortexA76(const sc_core::sc_module_name &mod_name, const Params &p);
  98
  99     void before_end_of_elaboration() override;
 100     Port &gem5_getPort(const std::string &if_name, int idx) override;
 101
 102     void
 103     end_of_elaboration() override
 104     {
 105         Base::end_of_elaboration();
 106         Base::start_of_simulation();
 107     }
 108     void start_of_simulation() override {}
 109 };
 110
 111 struct ScxEvsCortexA76x1Types
 112 {
 113     using Base = scx_evs_CortexA76x1;
 114     using Params = FastModelScxEvsCortexA76x1Params;
 115     static const int CoreCount = 1;
 116 };
 117 using ScxEvsCortexA76x1 = ScxEvsCortexA76<ScxEvsCortexA76x1Types>;
 118 extern template class ScxEvsCortexA76<ScxEvsCortexA76x1Types>;
 119
 120 struct ScxEvsCortexA76x2Types
 121 {
 122     using Base = scx_evs_CortexA76x2;
 123     using Params = FastModelScxEvsCortexA76x2Params;
 124     static const int CoreCount = 2;
 125 };
 126 using ScxEvsCortexA76x2 = ScxEvsCortexA76<ScxEvsCortexA76x2Types>;
 127 extern template class ScxEvsCortexA76<ScxEvsCortexA76x2Types>;
 128
 129 struct ScxEvsCortexA76x3Types
 130 {
 131     using Base = scx_evs_CortexA76x3;
 132     using Params = FastModelScxEvsCortexA76x3Params;
 133     static const int CoreCount = 3;
 134 };
 135 using ScxEvsCortexA76x3 = ScxEvsCortexA76<ScxEvsCortexA76x3Types>;
 136 extern template class ScxEvsCortexA76<ScxEvsCortexA76x3Types>;
 137
 138 struct ScxEvsCortexA76x4Types
 139 {
 140     using Base = scx_evs_CortexA76x4;
 141     using Params = FastModelScxEvsCortexA76x4Params;
 142     static const int CoreCount = 4;
 143 };
 144 using ScxEvsCortexA76x4 = ScxEvsCortexA76<ScxEvsCortexA76x4Types>;
 145 extern template class ScxEvsCortexA76<ScxEvsCortexA76x4Types>;
 146
 147 } // namespace FastModel
 148
 149 #endif // __ARCH_ARM_FASTMODEL_CORTEXA76_EVS_HH__