src/arch/arm/freebsd/fs_workload.hh

   1 /*
   2  * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
   3  * All rights reserved.
   4  *
   5  * This software was developed by the University of Cambridge Computer
   6  * Laboratory as part of the CTSRD Project, with support from the UK Higher
   7  * Education Innovation Fund (HEIF).
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions are
  11  * met: redistributions of source code must retain the above copyright
  12  * notice, this list of conditions and the following disclaimer;
  13  * redistributions in binary form must reproduce the above copyright
  14  * notice, this list of conditions and the following disclaimer in the
  15  * documentation and/or other materials provided with the distribution;
  16  * neither the name of the copyright holders nor the names of its
  17  * contributors may be used to endorse or promote products derived from
  18  * this software without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  23  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  24  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  31  */
  32
  33 #ifndef __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
  34 #define __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__
  35
  36 #include <map>
  37
  38 #include "arch/arm/fs_workload.hh"
  39 #include "kern/freebsd/events.hh"
  40 #include "params/ArmFsFreebsd.hh"
  41
  42 namespace ArmISA
  43 {
  44
  45 class FsFreebsd : public ArmISA::FsWorkload
  46 {
  47   public:
  48     /** Boilerplate params code */
  49     typedef ArmFsFreebsdParams Params;
  50     const Params *
  51     params() const
  52     {
  53         return dynamic_cast<const Params *>(&_params);
  54     }
  55
  56     /** When enabled, dump stats/task info on context switches for
  57      *  Streamline and per-thread cache occupancy studies, etc. */
  58     bool enableContextSwitchStatsDump;
  59
  60     /** This map stores a mapping of OS process IDs to internal Task IDs. The
  61      * mapping is done because the stats system doesn't tend to like vectors
  62      * that are much greater than 1000 items and the entire process space is
  63      * 65K. */
  64     std::map<uint32_t, uint32_t> taskMap;
  65
  66     /** This is a file that is placed in the run directory that prints out
  67      * mappings between taskIds and OS process IDs */
  68     std::ostream* taskFile;
  69
  70     FsFreebsd(Params *p);
  71     ~FsFreebsd();
  72
  73     void initState() override;
  74
  75     /** This function creates a new task Id for the given pid.
  76      * @param tc thread context that is currentyl executing  */
  77     void mapPid(ThreadContext* tc, uint32_t pid);
  78
  79   private:
  80     /** Event to halt the simulator if the kernel calls panic()  */
  81     PCEvent *kernelPanicEvent = nullptr;
  82
  83     /** Event to halt the simulator if the kernel calls oopses  */
  84     PCEvent *kernelOopsEvent = nullptr;
  85
  86     /**
  87      * PC based event to skip udelay(<time>) calls and quiesce the
  88      * processor for the appropriate amount of time. This is not functionally
  89      * required but does speed up simulation.
  90      */
  91     FreeBSD::UDelayEvent *uDelaySkipEvent = nullptr;
  92
  93     /** These variables store addresses of important data structures
  94      * that are normaly kept coherent at boot with cache mainetence operations.
  95      * Since these operations aren't supported in gem5, we keep them coherent
  96      * by making them uncacheable until all processors in the system boot.
  97      */
  98     Addr secDataPtrAddr;
  99     Addr secDataAddr;
 100     Addr penReleaseAddr;
 101     Addr pen64ReleaseAddr;
 102     Addr bootReleaseAddr;
 103 };
 104
 105 } // namespace ArmISA
 106
 107 #endif // __ARCH_ARM_FREEBSD_FS_WORKLOAD_HH__