hsail: Fix disassembly of load instruction with 3 destination operands
[gem5.git] / src / arch / arm / freebsd / system.hh
1 /*
2 * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * This software was developed by the University of Cambridge Computer
6 * Laboratory as part of the CTSRD Project, with support from the UK Higher
7 * Education Innovation Fund (HEIF).
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions are
11 * met: redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer;
13 * redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution;
16 * neither the name of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef __ARCH_ARM_FREEBSD_SYSTEM_HH__
34 #define __ARCH_ARM_FREEBSD_SYSTEM_HH__
35
36 #include <cstdio>
37 #include <map>
38 #include <string>
39 #include <vector>
40
41 #include "arch/arm/system.hh"
42 #include "base/output.hh"
43 #include "kern/freebsd/events.hh"
44 #include "params/FreebsdArmSystem.hh"
45 #include "sim/core.hh"
46
47 class DumpStatsPCEventF;
48
49 class FreebsdArmSystem : public GenericArmSystem
50 {
51 protected:
52 DumpStatsPCEventF *dumpStatsPCEventF;
53
54 public:
55 /** Boilerplate params code */
56 typedef FreebsdArmSystemParams Params;
57 const Params *
58 params() const
59 {
60 return dynamic_cast<const Params *>(_params);
61 }
62
63 /** When enabled, dump stats/task info on context switches for
64 * Streamline and per-thread cache occupancy studies, etc. */
65 bool enableContextSwitchStatsDump;
66
67 /** This map stores a mapping of OS process IDs to internal Task IDs. The
68 * mapping is done because the stats system doesn't tend to like vectors
69 * that are much greater than 1000 items and the entire process space is
70 * 65K. */
71 std::map<uint32_t, uint32_t> taskMap;
72
73 /** This is a file that is placed in the run directory that prints out
74 * mappings between taskIds and OS process IDs */
75 std::ostream* taskFile;
76
77 FreebsdArmSystem(Params *p);
78 ~FreebsdArmSystem();
79
80 void initState();
81
82 void startup();
83
84 /** This function creates a new task Id for the given pid.
85 * @param tc thread context that is currentyl executing */
86 void mapPid(ThreadContext* tc, uint32_t pid);
87
88 private:
89 /** Event to halt the simulator if the kernel calls panic() */
90 PCEvent *kernelPanicEvent;
91
92 /** Event to halt the simulator if the kernel calls oopses */
93 PCEvent *kernelOopsEvent;
94
95 /**
96 * PC based event to skip udelay(<time>) calls and quiesce the
97 * processor for the appropriate amount of time. This is not functionally
98 * required but does speed up simulation.
99 */
100 FreeBSD::UDelayEvent *uDelaySkipEvent;
101
102 /** Another PC based skip event for const_udelay(). Similar to the udelay
103 * skip, but this function precomputes the first multiply that is done
104 * in the generic case since the parameter is known at compile time.
105 * Thus we need to do some division to get back to us.
106 */
107 FreeBSD::UDelayEvent *constUDelaySkipEvent;
108
109 /** These variables store addresses of important data structures
110 * that are normaly kept coherent at boot with cache mainetence operations.
111 * Since these operations aren't supported in gem5, we keep them coherent
112 * by making them uncacheable until all processors in the system boot.
113 */
114 Addr secDataPtrAddr;
115 Addr secDataAddr;
116 Addr penReleaseAddr;
117 Addr pen64ReleaseAddr;
118 Addr bootReleaseAddr;
119 };
120
121 class DumpStatsPCEventF : public PCEvent
122 {
123 public:
124 DumpStatsPCEventF(PCEventQueue *q, const std::string &desc, Addr addr)
125 : PCEvent(q, desc, addr)
126 {}
127
128 virtual void process(ThreadContext* tc);
129 };
130
131
132 #endif // __ARCH_ARM_FREEBSD_SYSTEM_HH__
133