110ed00c5d9d3da2d07715cb74ebc017da203901
[gem5.git] / src / arch / arm / fs_workload.cc
1 /*
2 * Copyright (c) 2010, 2012-2013, 2015,2017-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 #include "arch/arm/fs_workload.hh"
42
43 #include "arch/arm/faults.hh"
44 #include "base/loader/object_file.hh"
45 #include "base/loader/symtab.hh"
46 #include "cpu/thread_context.hh"
47 #include "dev/arm/gic_v2.hh"
48 #include "kern/system_events.hh"
49 #include "params/ArmFsWorkload.hh"
50
51 namespace ArmISA
52 {
53
54 void
55 SkipFunc::returnFromFuncIn(ThreadContext *tc)
56 {
57 PCState newPC = tc->pcState();
58 if (inAArch64(tc)) {
59 newPC.set(tc->readIntReg(INTREG_X30));
60 } else {
61 newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1));
62 }
63
64 CheckerCPU *checker = tc->getCheckerCpuPtr();
65 if (checker) {
66 tc->pcStateNoRecord(newPC);
67 } else {
68 tc->pcState(newPC);
69 }
70 }
71
72 FsWorkload::FsWorkload(const Params &p) : KernelWorkload(p)
73 {
74 if (kernelObj) {
75 kernelEntry = (kernelObj->entryPoint() & loadAddrMask()) +
76 loadAddrOffset();
77 }
78
79 bootLoaders.reserve(p.boot_loader.size());
80 for (const auto &bl : p.boot_loader) {
81 std::unique_ptr<Loader::ObjectFile> bl_obj;
82 bl_obj.reset(Loader::createObjectFile(bl));
83
84 fatal_if(!bl_obj, "Could not read bootloader: %s", bl);
85 bootLoaders.emplace_back(std::move(bl_obj));
86 }
87
88 bootldr = getBootLoader(kernelObj);
89
90 fatal_if(!bootLoaders.empty() && !bootldr,
91 "Can't find a matching boot loader / kernel combination!");
92
93 if (bootldr)
94 Loader::debugSymbolTable.insert(*bootldr->symtab().globals());
95 }
96
97 void
98 FsWorkload::initState()
99 {
100 KernelWorkload::initState();
101
102 // Reset CP15?? What does that mean -- ali
103
104 // FPEXC.EN = 0
105
106 for (auto *tc: system->threads) {
107 Reset().invoke(tc);
108 tc->activate();
109 }
110
111 auto *arm_sys = dynamic_cast<ArmSystem *>(system);
112
113 if (bootldr) {
114 bool is_gic_v2 =
115 arm_sys->getGIC()->supportsVersion(BaseGic::GicVersion::GIC_V2);
116 bootldr->buildImage().write(system->physProxy);
117
118 inform("Using bootloader at address %#x", bootldr->entryPoint());
119
120 // Put the address of the boot loader into r7 so we know
121 // where to branch to after the reset fault
122 // All other values needed by the boot loader to know what to do
123 fatal_if(!arm_sys->params().flags_addr,
124 "flags_addr must be set with bootloader");
125
126 fatal_if(!arm_sys->params().gic_cpu_addr && is_gic_v2,
127 "gic_cpu_addr must be set with bootloader");
128
129 for (auto *tc: arm_sys->threads) {
130 if (!arm_sys->highestELIs64())
131 tc->setIntReg(3, kernelEntry);
132 if (is_gic_v2)
133 tc->setIntReg(4, arm_sys->params().gic_cpu_addr);
134 tc->setIntReg(5, arm_sys->params().flags_addr);
135 }
136 inform("Using kernel entry physical address at %#x\n", kernelEntry);
137 } else {
138 // Set the initial PC to be at start of the kernel code
139 if (!arm_sys->highestELIs64())
140 arm_sys->threads[0]->pcState(kernelObj->entryPoint());
141 }
142 }
143
144 Loader::ObjectFile *
145 FsWorkload::getBootLoader(Loader::ObjectFile *const obj)
146 {
147 if (obj) {
148 for (auto &bl : bootLoaders) {
149 if (bl->getArch() == obj->getArch())
150 return bl.get();
151 }
152 } else if (!bootLoaders.empty()) {
153 return bootLoaders[0].get();
154 }
155
156 return nullptr;
157 }
158
159 } // namespace ArmISA
160
161 ArmISA::FsWorkload *
162 ArmFsWorkloadParams::create() const
163 {
164 return new ArmISA::FsWorkload(*this);
165 }