src/arch/arm/insts/mem.cc

   1 /* Copyright (c) 2007-2008 The Florida State University
   2  * All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions are
   6  * met: redistributions of source code must retain the above copyright
   7  * notice, this list of conditions and the following disclaimer;
   8  * redistributions in binary form must reproduce the above copyright
   9  * notice, this list of conditions and the following disclaimer in the
  10  * documentation and/or other materials provided with the distribution;
  11  * neither the name of the copyright holders nor the names of its
  12  * contributors may be used to endorse or promote products derived from
  13  * this software without specific prior written permission.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  16  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  17  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  18  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  19  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  20  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  21  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  25  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  26  *
  27  * Authors: Stephen Hines
  28  */
  29
  30 #include "arch/arm/insts/mem.hh"
  31 #include "base/loader/symtab.hh"
  32
  33 namespace ArmISA
  34 {
  35 std::string
  36 Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
  37 {
  38     std::stringstream ss;
  39     printMnemonic(ss);
  40     printReg(ss, machInst.rd);
  41     ss << ", [";
  42     printReg(ss, machInst.rn);
  43     ss << ", ";
  44     if (machInst.puswl.prepost == 1)
  45         printOffset(ss);
  46     ss << "]";
  47     if (machInst.puswl.prepost == 0)
  48         printOffset(ss);
  49     else if (machInst.puswl.writeback)
  50         ss << "!";
  51     return ss.str();
  52 }
  53 }