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40 #include "arch/arm/insts/misc64.hh"
43 ImmOp64::generateDisassembly(Addr pc
, const SymbolTable
*symtab
) const
46 printMnemonic(ss
, "", false);
47 ccprintf(ss
, "#0x%x", imm
);
52 RegRegImmImmOp64::generateDisassembly(Addr pc
, const SymbolTable
*symtab
) const
55 printMnemonic(ss
, "", false);
56 printIntReg(ss
, dest
);
59 ccprintf(ss
, ", #%d, #%d", imm1
, imm2
);
64 RegRegRegImmOp64::generateDisassembly(
65 Addr pc
, const SymbolTable
*symtab
) const
68 printMnemonic(ss
, "", false);
69 printIntReg(ss
, dest
);
74 ccprintf(ss
, ", #%d", imm
);
79 UnknownOp64::generateDisassembly(Addr pc
, const SymbolTable
*symtab
) const
81 return csprintf("%-10s (inst %#08x)", "unknown", machInst
& mask(32));
85 MiscRegRegImmOp64::generateDisassembly(
86 Addr pc
, const SymbolTable
*symtab
) const
90 printMiscReg(ss
, dest
);
97 RegMiscRegImmOp64::generateDisassembly(
98 Addr pc
, const SymbolTable
*symtab
) const
100 std::stringstream ss
;
102 printIntReg(ss
, dest
);
104 printMiscReg(ss
, op1
);