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41 #ifndef __ARCH_ARM_INSTS_PREDINST_HH__
42 #define __ARCH_ARM_INSTS_PREDINST_HH__
44 #include "arch/arm/insts/static_inst.hh"
45 #include "base/logging.hh"
46 #include "base/trace.hh"
50 static inline uint32_t
51 rotate_imm(uint32_t immValue, uint32_t rotateValue)
54 return rotateValue == 0 ? immValue :
55 (immValue >> rotateValue) | (immValue << (32 - rotateValue));
58 static inline uint32_t
59 modified_imm(uint8_t ctrlImm, uint8_t dataImm)
61 uint32_t bigData = dataImm;
62 uint32_t bigCtrl = ctrlImm;
68 return bigData | (bigData << 16);
70 return (bigData << 8) | (bigData << 24);
72 return (bigData << 0) | (bigData << 8) |
73 (bigData << 16) | (bigData << 24);
76 bigCtrl = (bigCtrl << 1) | ((bigData >> 7) & 0x1);
78 return bigData << (32 - bigCtrl);
81 static inline uint64_t
82 simd_modified_imm(bool op, uint8_t cmode, uint8_t data, bool &immValid,
83 bool isAarch64 = false)
85 uint64_t bigData = data;
90 bigData = (bigData << 0) | (bigData << 32);
94 bigData = (bigData << 8) | (bigData << 40);
98 bigData = (bigData << 16) | (bigData << 48);
102 bigData = (bigData << 24) | (bigData << 56);
106 bigData = (bigData << 0) | (bigData << 16) |
107 (bigData << 32) | (bigData << 48);
111 bigData = (bigData << 8) | (bigData << 24) |
112 (bigData << 40) | (bigData << 56);
115 bigData = (0xffULL << 0) | (bigData << 8) |
116 (0xffULL << 32) | (bigData << 40);
119 bigData = (0xffffULL << 0) | (bigData << 16) |
120 (0xffffULL << 32) | (bigData << 48);
125 for (int i = 7; i >= 0; i--) {
127 bigData |= (ULL(0xFF) << (i * 8));
131 bigData = (bigData << 0) | (bigData << 8) |
132 (bigData << 16) | (bigData << 24) |
133 (bigData << 32) | (bigData << 40) |
134 (bigData << 48) | (bigData << 56);
141 bVal = bits(bigData, 6) ? (0x1F) : (0x20);
142 bigData = (bits(bigData, 5, 0) << 19) |
143 (bVal << 25) | (bits(bigData, 7) << 31);
144 bigData |= (bigData << 32);
146 } else if (isAarch64) {
147 bVal = bits(bigData, 6) ? (0x0FF) : (0x100);
148 bigData = (bits(bigData, 5, 0) << 48) |
149 (bVal << 54) | (bits(bigData, 7) << 63);
161 /** Floating point data types. */
162 enum class FpDataType { Fp16, Fp32, Fp64 };
164 static inline uint64_t
165 vfp_modified_imm(uint8_t data, FpDataType dtype)
167 uint64_t bigData = data;
170 case FpDataType::Fp16:
171 repData = bits(data, 6) ? 0x3 : 0;
172 bigData = (bits(bigData, 5, 0) << 6) |
173 (repData << 12) | (bits(~bigData, 6) << 14) |
174 (bits(bigData, 7) << 15);
176 case FpDataType::Fp32:
177 repData = bits(data, 6) ? 0x1F : 0;
178 bigData = (bits(bigData, 5, 0) << 19) |
179 (repData << 25) | (bits(~bigData, 6) << 30) |
180 (bits(bigData, 7) << 31);
182 case FpDataType::Fp64:
183 repData = bits(data, 6) ? 0xFF : 0;
184 bigData = (bits(bigData, 5, 0) << 48) |
185 (repData << 54) | (bits(~bigData, 6) << 62) |
186 (bits(bigData, 7) << 63);
189 panic("Unrecognized FP data type");
194 static inline FpDataType
195 decode_fp_data_type(uint8_t encoding)
198 case 1: return FpDataType::Fp16;
199 case 2: return FpDataType::Fp32;
200 case 3: return FpDataType::Fp64;
203 "Invalid floating point data type in VFP/SIMD or SVE instruction");
208 * Base class for predicated integer operations.
210 class PredOp : public ArmStaticInst
214 ConditionCode condCode;
217 PredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
218 ArmStaticInst(mnem, _machInst, __opClass)
220 if (machInst.aarch64)
222 else if (machInst.itstateMask)
223 condCode = (ConditionCode)(uint8_t)machInst.itstateCond;
225 condCode = (ConditionCode)(unsigned)machInst.condCode;
230 * Base class for predicated immediate operations.
232 class PredImmOp : public PredOp
237 uint32_t rotated_imm;
238 uint32_t rotated_carry;
242 PredImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
243 PredOp(mnem, _machInst, __opClass),
244 imm(machInst.imm), rotated_imm(0), rotated_carry(0),
245 rotate(machInst.rotate << 1)
247 rotated_imm = rotate_imm(imm, rotate);
249 rotated_carry = bits(rotated_imm, 31);
252 std::string generateDisassembly(
253 Addr pc, const SymbolTable *symtab) const override;
257 * Base class for predicated integer operations.
259 class PredIntOp : public PredOp
267 PredIntOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
268 PredOp(mnem, _machInst, __opClass),
269 shift_size(machInst.shiftSize), shift(machInst.shift)
273 std::string generateDisassembly(
274 Addr pc, const SymbolTable *symtab) const override;
277 class DataImmOp : public PredOp
280 IntRegIndex dest, op1;
282 // Whether the carry flag should be modified if that's an option for
286 DataImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
287 IntRegIndex _dest, IntRegIndex _op1, uint32_t _imm, bool _rotC) :
288 PredOp(mnem, _machInst, __opClass),
289 dest(_dest), op1(_op1), imm(_imm), rotC(_rotC)
292 std::string generateDisassembly(
293 Addr pc, const SymbolTable *symtab) const override;
296 class DataRegOp : public PredOp
299 IntRegIndex dest, op1, op2;
301 ArmShiftType shiftType;
303 DataRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
304 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
305 int32_t _shiftAmt, ArmShiftType _shiftType) :
306 PredOp(mnem, _machInst, __opClass),
307 dest(_dest), op1(_op1), op2(_op2),
308 shiftAmt(_shiftAmt), shiftType(_shiftType)
311 std::string generateDisassembly(
312 Addr pc, const SymbolTable *symtab) const override;
315 class DataRegRegOp : public PredOp
318 IntRegIndex dest, op1, op2, shift;
319 ArmShiftType shiftType;
321 DataRegRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
322 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
323 IntRegIndex _shift, ArmShiftType _shiftType) :
324 PredOp(mnem, _machInst, __opClass),
325 dest(_dest), op1(_op1), op2(_op2), shift(_shift),
326 shiftType(_shiftType)
329 std::string generateDisassembly(
330 Addr pc, const SymbolTable *symtab) const override;
334 * Base class for predicated macro-operations.
336 class PredMacroOp : public PredOp
340 uint32_t numMicroops;
341 StaticInstPtr * microOps;
344 PredMacroOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
345 PredOp(mnem, _machInst, __opClass),
346 numMicroops(0), microOps(nullptr)
348 // We rely on the subclasses of this object to handle the
349 // initialization of the micro-operations, since they are
350 // all of variable length
351 flags[IsMacroop] = true;
361 fetchMicroop(MicroPC microPC) const override
363 assert(microPC < numMicroops);
364 return microOps[microPC];
368 execute(ExecContext *, Trace::InstRecord *) const override
370 panic("Execute method called when it shouldn't!");
373 std::string generateDisassembly(
374 Addr pc, const SymbolTable *symtab) const override;
378 * Base class for predicated micro-operations.
380 class PredMicroop : public PredOp
383 PredMicroop(const char *mnem, ExtMachInst _machInst, OpClass __opClass) :
384 PredOp(mnem, _machInst, __opClass)
386 flags[IsMicroop] = true;
390 advancePC(PCState &pcState) const
392 if (flags[IsLastMicroop])
400 #endif //__ARCH_ARM_INSTS_PREDINST_HH__