src/arch/arm/insts/pseudo.cc

   1 /*
   2  * Copyright (c) 2014,2016-2018 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2007-2008 The Florida State University
  15  * All rights reserved.
  16  *
  17  * Redistribution and use in source and binary forms, with or without
  18  * modification, are permitted provided that the following conditions are
  19  * met: redistributions of source code must retain the above copyright
  20  * notice, this list of conditions and the following disclaimer;
  21  * redistributions in binary form must reproduce the above copyright
  22  * notice, this list of conditions and the following disclaimer in the
  23  * documentation and/or other materials provided with the distribution;
  24  * neither the name of the copyright holders nor the names of its
  25  * contributors may be used to endorse or promote products derived from
  26  * this software without specific prior written permission.
  27  *
  28  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  31  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  34  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  35  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  36  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  37  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  38  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  39  */
  40
  41 #include "arch/arm/insts/pseudo.hh"
  42
  43 #include "cpu/exec_context.hh"
  44
  45 DecoderFaultInst::DecoderFaultInst(ExtMachInst _machInst)
  46     : ArmStaticInst("gem5decoderFault", _machInst, No_OpClass),
  47       faultId(static_cast<DecoderFault>(
  48                   static_cast<uint8_t>(_machInst.decoderFault)))
  49 {
  50     // Don't call execute() if we're on a speculative path and the
  51     // fault is an internal panic fault.
  52     flags[IsNonSpeculative] = (faultId == DecoderFault::PANIC);
  53 }
  54
  55 Fault
  56 DecoderFaultInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const
  57 {
  58     const PCState pc_state(xc->pcState());
  59     const Addr pc(pc_state.instAddr());
  60
  61     switch (faultId) {
  62       case DecoderFault::UNALIGNED:
  63         if (machInst.aarch64) {
  64             return std::make_shared<PCAlignmentFault>(pc);
  65         } else {
  66             // TODO: We should check if we the receiving end is in
  67             // aarch64 mode and raise a PCAlignment fault instead.
  68             return std::make_shared<PrefetchAbort>(
  69                 pc, ArmFault::AlignmentFault);
  70         }
  71
  72       case DecoderFault::PANIC:
  73         panic("Internal error in instruction decoder\n");
  74
  75       case DecoderFault::OK:
  76         panic("Decoder fault instruction without decoder fault.\n");
  77     }
  78
  79     panic("Unhandled fault type");
  80 }
  81
  82 const char *
  83 DecoderFaultInst::faultName() const
  84 {
  85     switch (faultId) {
  86       case DecoderFault::OK:
  87         return "OK";
  88
  89       case DecoderFault::UNALIGNED:
  90         return "UnalignedInstruction";
  91
  92       case DecoderFault::PANIC:
  93         return "DecoderPanic";
  94     }
  95
  96     panic("Unhandled fault type");
  97 }
  98
  99 std::string
 100 DecoderFaultInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 101 {
 102     return csprintf("gem5fault %s", faultName());
 103 }
 104
 105
 106
 107 FailUnimplemented::FailUnimplemented(const char *_mnemonic,
 108                                      ExtMachInst _machInst)
 109     : ArmStaticInst(_mnemonic, _machInst, No_OpClass)
 110 {
 111     // don't call execute() (which panics) if we're on a
 112     // speculative path
 113     flags[IsNonSpeculative] = true;
 114 }
 115
 116 FailUnimplemented::FailUnimplemented(const char *_mnemonic,
 117                                      ExtMachInst _machInst,
 118                                      const std::string& _fullMnemonic)
 119     : ArmStaticInst(_mnemonic, _machInst, No_OpClass),
 120       fullMnemonic(_fullMnemonic)
 121 {
 122     // don't call execute() (which panics) if we're on a
 123     // speculative path
 124     flags[IsNonSpeculative] = true;
 125 }
 126
 127 Fault
 128 FailUnimplemented::execute(ExecContext *xc, Trace::InstRecord *traceData) const
 129 {
 130     return std::make_shared<UndefinedInstruction>(machInst, false, mnemonic);
 131 }
 132
 133 std::string
 134 FailUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 135 {
 136     return csprintf("%-10s (unimplemented)",
 137                     fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
 138 }
 139
 140
 141
 142 WarnUnimplemented::WarnUnimplemented(const char *_mnemonic,
 143                                      ExtMachInst _machInst)
 144     : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
 145 {
 146     // don't call execute() (which panics) if we're on a
 147     // speculative path
 148     flags[IsNonSpeculative] = true;
 149 }
 150
 151 WarnUnimplemented::WarnUnimplemented(const char *_mnemonic,
 152                                      ExtMachInst _machInst,
 153                                      const std::string& _fullMnemonic)
 154     : ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false),
 155       fullMnemonic(_fullMnemonic)
 156 {
 157     // don't call execute() (which panics) if we're on a
 158     // speculative path
 159     flags[IsNonSpeculative] = true;
 160 }
 161
 162 Fault
 163 WarnUnimplemented::execute(ExecContext *xc, Trace::InstRecord *traceData) const
 164 {
 165     if (!warned) {
 166         warn("\tinstruction '%s' unimplemented\n",
 167              fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
 168         warned = true;
 169     }
 170
 171     return NoFault;
 172 }
 173
 174 std::string
 175 WarnUnimplemented::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 176 {
 177     return csprintf("%-10s (unimplemented)",
 178                     fullMnemonic.size() ? fullMnemonic.c_str() : mnemonic);
 179 }
 180
 181 IllegalExecInst::IllegalExecInst(ExtMachInst _machInst)
 182     : ArmStaticInst("Illegal Execution", _machInst, No_OpClass)
 183 {}
 184
 185 Fault
 186 IllegalExecInst::execute(ExecContext *xc, Trace::InstRecord *traceData) const
 187 {
 188     return std::make_shared<IllegalInstSetStateFault>();
 189 }