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38 #include "arch/arm/interrupts.hh"
40 #include "arch/arm/system.hh"
43 ArmInterruptsParams::create()
45 return new ArmISA::Interrupts(this);
49 ArmISA::Interrupts::takeInt(InterruptTypes int_type
) const
51 // Table G1-17~19 of ARM V8 ARM
53 bool highest_el_is_64
= ArmSystem::highestELIs64(tc
);
55 CPSR cpsr
= tc
->readMiscReg(MISCREG_CPSR
);
58 hcr
= tc
->readMiscReg(MISCREG_HCR
);
59 ExceptionLevel el
= currEL(tc
);
60 bool cpsr_mask_bit
, scr_routing_bit
, scr_fwaw_bit
, hcr_mask_override_bit
;
62 if (!highest_el_is_64
)
63 scr
= tc
->readMiscReg(MISCREG_SCR
);
65 scr
= tc
->readMiscReg(MISCREG_SCR_EL3
);
67 bool is_secure
= isSecure(tc
);
71 cpsr_mask_bit
= cpsr
.f
;
72 scr_routing_bit
= scr
.fiq
;
73 scr_fwaw_bit
= scr
.fw
;
74 hcr_mask_override_bit
= hcr
.fmo
;
77 cpsr_mask_bit
= cpsr
.i
;
78 scr_routing_bit
= scr
.irq
;
80 hcr_mask_override_bit
= hcr
.imo
;
83 cpsr_mask_bit
= cpsr
.a
;
84 scr_routing_bit
= scr
.ea
;
85 scr_fwaw_bit
= scr
.aw
;
86 hcr_mask_override_bit
= hcr
.amo
;
89 panic("Unhandled interrupt type!");
93 hcr_mask_override_bit
= 1;
95 if (!highest_el_is_64
) {
97 if (!scr_routing_bit
) {
99 if (!hcr_mask_override_bit
)
102 if (!is_secure
&& (el
== EL0
|| el
== EL1
))
110 (hcr_mask_override_bit
||
111 (!scr_fwaw_bit
&& !hcr_mask_override_bit
)))
118 if (!scr_routing_bit
) {
122 if (!hcr_mask_override_bit
) {
130 else if (is_secure
|| el
== EL2
)
137 if (!hcr_mask_override_bit
) {
138 if (el
== EL3
|| el
== EL2
)
145 else if (is_secure
|| el
== EL2
)
160 return ((mask
== INT_MASK_T
) ||
161 ((mask
== INT_MASK_M
) && !cpsr_mask_bit
)) &&
162 (mask
!= INT_MASK_P
);