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43 #ifndef __ARCH_ARM_INTERRUPT_HH__
44 #define __ARCH_ARM_INTERRUPT_HH__
46 #include "arch/arm/faults.hh"
47 #include "arch/arm/isa_traits.hh"
48 #include "arch/arm/miscregs.hh"
49 #include "arch/arm/registers.hh"
50 #include "cpu/thread_context.hh"
51 #include "debug/Interrupt.hh"
52 #include "params/ArmInterrupts.hh"
53 #include "sim/sim_object.hh"
58 class Interrupts : public SimObject
63 bool interrupts[NumInterruptTypes];
69 setCPU(BaseCPU * _cpu)
74 typedef ArmInterruptsParams Params;
79 return dynamic_cast<const Params *>(_params);
82 Interrupts(Params * p) : SimObject(p), cpu(NULL)
89 post(int int_num, int index)
91 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
93 if (int_num < 0 || int_num >= NumInterruptTypes)
94 panic("int_num out of bounds\n");
97 panic("No support for other interrupt indexes\n");
99 interrupts[int_num] = true;
100 intStatus |= ULL(1) << int_num;
104 clear(int int_num, int index)
106 DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
108 if (int_num < 0 || int_num >= NumInterruptTypes)
109 panic("int_num out of bounds\n");
112 panic("No support for other interrupt indexes\n");
114 interrupts[int_num] = false;
115 intStatus &= ~(ULL(1) << int_num);
121 DPRINTF(Interrupt, "Interrupts all cleared\n");
123 memset(interrupts, 0, sizeof(interrupts));
127 checkInterrupts(ThreadContext *tc) const
132 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
134 return ((interrupts[INT_IRQ] && !cpsr.i) ||
135 (interrupts[INT_FIQ] && !cpsr.f) ||
136 (interrupts[INT_ABT] && !cpsr.a) ||
137 (interrupts[INT_RST]) ||
138 (interrupts[INT_SEV]));
142 * Check the raw interrupt state.
143 * This function is used to check if a wfi operation should sleep. If there
144 * is an interrupt pending, even if it's masked, wfi doesn't sleep.
145 * @return any interrupts pending
155 getInterrupt(ThreadContext *tc)
160 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
162 if (interrupts[INT_IRQ] && !cpsr.i)
163 return new Interrupt;
164 if (interrupts[INT_FIQ] && !cpsr.f)
165 return new FastInterrupt;
166 if (interrupts[INT_ABT] && !cpsr.a)
167 return new DataAbort(0, false, 0,
168 ArmFault::AsynchronousExternalAbort);
169 if (interrupts[INT_RST])
171 if (interrupts[INT_SEV])
174 panic("intStatus and interrupts not in sync\n");
178 updateIntrInfo(ThreadContext *tc)
184 serialize(std::ostream &os)
186 SERIALIZE_ARRAY(interrupts, NumInterruptTypes);
187 SERIALIZE_SCALAR(intStatus);
191 unserialize(Checkpoint *cp, const std::string §ion)
193 UNSERIALIZE_ARRAY(interrupts, NumInterruptTypes);
194 UNSERIALIZE_SCALAR(intStatus);
197 } // namespace ARM_ISA
199 #endif // __ARCH_ARM_INTERRUPT_HH__