3 // Copyright (c) 2010 ARM Limited
6 // The license below extends only to copyright in the software and shall
7 // not be construed as granting a license to any other intellectual
8 // property including but not limited to intellectual property relating
9 // to a hardware implementation of the functionality of the software
10 // licensed hereunder. You may use the software subject to the license
11 // terms below provided that you ensure that this notice is replicated
12 // unmodified and in its entirety in all distributions of the software,
13 // modified or unmodified, in source code or in binary form.
15 // Copyright (c) 2007-2008 The Florida State University
16 // All rights reserved.
18 // Redistribution and use in source and binary forms, with or without
19 // modification, are permitted provided that the following conditions are
20 // met: redistributions of source code must retain the above copyright
21 // notice, this list of conditions and the following disclaimer;
22 // redistributions in binary form must reproduce the above copyright
23 // notice, this list of conditions and the following disclaimer in the
24 // documentation and/or other materials provided with the distribution;
25 // neither the name of the copyright holders nor the names of its
26 // contributors may be used to endorse or promote products derived from
27 // this software without specific prior written permission.
29 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 // Authors: Gabe Black
43 def format AddrMode2(imm) {{
49 def buildPUBWLCase(p, u, b, w, l):
50 return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0)
52 header_output = decoder_output = exec_output = ""
53 decode_block = "switch(PUBWL) {\n"
55 # Loop over all the values of p, u, b, w and l and build instructions and
56 # a decode block for them.
62 user = (p == 0 and w == 1)
63 writeback = (p == 0 or w == 1)
74 newDecode = "return new %s(machInst, RD, RN," + \
75 "%s, machInst.immed11_0);"
76 loadClass = loadImmClassName(post, add, writeback,
78 storeClass = storeImmClassName(post, add, writeback,
80 loadDecode = newDecode % (loadClass, addStr)
81 storeDecode = newDecode % (storeClass, addStr)
83 newDecode = "return new %s(machInst, RD, RN, %s," + \
84 "machInst.shiftSize," + \
85 "machInst.shift, RM);"
86 loadClass = loadRegClassName(post, add, writeback,
88 storeClass = storeRegClassName(post, add, writeback,
90 loadDecode = newDecode % (loadClass, addStr)
91 storeDecode = newDecode % (storeClass, addStr)
97 decode_block += decode % \
98 (buildPUBWLCase(p,u,b,w,1), loadDecode)
99 decode_block += decode % \
100 (buildPUBWLCase(p,u,b,w,0), storeDecode)
103 return new Unknown(machInst);
108 def format AddrMode3() {{
111 const uint32_t op1 = bits(machInst, 24, 20);
112 const uint32_t op2 = bits(machInst, 6, 5);
113 const uint32_t puiw = bits(machInst, 24, 21);
114 const uint32_t imm = IMMED_HI_11_8 << 4 | IMMED_LO_3_0;
125 } else if ((RT %% 2) == 0) {
128 return new Unknown(machInst);
137 return new Unknown(machInst);
142 def decodePuiwCase(load, d, p, u, i, w, size=4, sign=False):
144 user = (p == 0 and w == 1)
145 writeback = (p == 0 or w == 1)
147 caseVal = (p << 3) + (u << 2) + (i << 1) + (w << 0)
150 return new '''% caseVal
156 dests = "RT & ~1, RT | 1"
162 className = loadDoubleImmClassName(post, add, writeback)
164 className = loadImmClassName(post, add, writeback, \
165 size=size, sign=sign, \
169 className = storeDoubleImmClassName(post, add, writeback)
171 className = storeImmClassName(post, add, writeback, \
172 size=size, sign=sign, \
174 decode += ("%s(machInst, %s, RN, %s, imm);\n" % \
175 (className, dests, addStr))
179 className = loadDoubleRegClassName(post, add, writeback)
181 className = loadRegClassName(post, add, writeback, \
182 size=size, sign=sign, \
186 className = storeDoubleRegClassName(post, add, writeback)
188 className = storeRegClassName(post, add, writeback, \
189 size=size, sign=sign, \
191 decode += ("%s(machInst, %s, RN, %s, 0, LSL, RM);\n" % \
192 (className, dests, addStr))
195 def decodePuiw(load, d, size=4, sign=False):
196 global decodePuiwCase
197 decode = "switch (puiw) {\n"
202 decode += decodePuiwCase(load, d, p, u, i, w,
206 return new Unknown(machInst);
212 "ldrh" : decodePuiw(True, False, size=2),
213 "strh" : decodePuiw(False, False, size=2),
214 "ldrsb" : decodePuiw(True, False, size=1, sign=True),
215 "ldrd" : decodePuiw(True, True),
216 "ldrsh" : decodePuiw(True, False, size=2, sign=True),
217 "strd" : decodePuiw(False, True)
219 decode_block = decode % subs
222 def format ArmSyncMem() {{
225 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
226 const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
227 const IntRegIndex rt2 = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
230 return new Swp(machInst, rt, rt2, rn);
232 return new Swpb(machInst, rt, rt2, rn);
234 return new %(strex)s(machInst, rt, rt2, rn, true, 0);
236 return new %(ldrex)s(machInst, rt, rn, true, 0);
238 return new %(strexd)s(machInst, rt, rt2, rt2 + 1, rn, true, 0);
240 return new %(ldrexd)s(machInst, rt, rt + 1, rn, true, 0);
242 return new %(strexb)s(machInst, rt, rt2, rn, true, 0);
244 return new %(ldrexb)s(machInst, rt, rn, true, 0);
246 return new %(strexh)s(machInst, rt, rt2, rn, true, 0);
248 return new %(ldrexh)s(machInst, rt, rn, true, 0);
250 return new Unknown(machInst);
254 "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4),
255 "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1),
256 "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2),
257 "ldrexd" : "LDREXD_" + loadDoubleImmClassName(False, True, False),
258 "strex" : "STREX_" + storeImmClassName(False, True, False, size=4),
259 "strexb" : "STREXB_" + storeImmClassName(False, True, False, size=1),
260 "strexh" : "STREXH_" + storeImmClassName(False, True, False, size=2),
261 "strexd" : "STREXD_" + storeDoubleImmClassName(False, True, False)
265 def format Thumb32SrsRfe() {{
268 const bool wb = (bits(machInst, 21) == 1);
269 const bool add = (bits(machInst, 24, 23) == 0x3);
270 if (bits(machInst, 20) == 1) {
272 const IntRegIndex rn =
273 (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
275 return new %(rfe)s(machInst, rn, RfeOp::DecrementBefore, wb);
276 } else if (add && !wb) {
277 return new %(rfe_u)s(machInst, rn, RfeOp::IncrementAfter, wb);
278 } else if (!add && wb) {
279 return new %(rfe_w)s(machInst, rn, RfeOp::DecrementBefore, wb);
281 return new %(rfe_uw)s(machInst, rn, RfeOp::IncrementAfter, wb);
284 const uint32_t mode = bits(machInst, 4, 0);
285 if (badMode32((OperatingMode)mode))
286 return new Unknown(machInst);
288 return new %(srs)s(machInst, mode,
289 SrsOp::DecrementBefore, wb);
290 } else if (add && !wb) {
291 return new %(srs_u)s(machInst, mode,
292 SrsOp::IncrementAfter, wb);
293 } else if (!add && wb) {
294 return new %(srs_w)s(machInst, mode,
295 SrsOp::DecrementBefore, wb);
297 return new %(srs_uw)s(machInst, mode,
298 SrsOp::IncrementAfter, wb);
303 "rfe" : "RFE_" + loadImmClassName(False, False, False, 8),
304 "rfe_u" : "RFE_" + loadImmClassName(True, True, False, 8),
305 "rfe_w" : "RFE_" + loadImmClassName(False, False, True, 8),
306 "rfe_uw" : "RFE_" + loadImmClassName(True, True, True, 8),
307 "srs" : "SRS_" + storeImmClassName(False, False, False, 8),
308 "srs_u" : "SRS_" + storeImmClassName(True, True, False, 8),
309 "srs_w" : "SRS_" + storeImmClassName(False, False, True, 8),
310 "srs_uw" : "SRS_" + storeImmClassName(True, True, True, 8)
314 def format Thumb32LdrStrDExTbh() {{
317 const uint32_t op1 = bits(machInst, 24, 23);
318 const uint32_t op2 = bits(machInst, 21, 20);
319 const uint32_t op3 = bits(machInst, 7, 4);
320 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
321 const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
322 const IntRegIndex rt2 = (IntRegIndex)(uint32_t)bits(machInst, 11, 8);
323 const IntRegIndex rd = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
324 const uint32_t imm8 = bits(machInst, 7, 0);
325 if (bits(op1, 1) == 0 && bits(op2, 1) == 0) {
327 const uint32_t imm = bits(machInst, 7, 0) << 2;
329 return new %(strex)s(machInst, rt2, rt, rn, true, imm);
331 return new %(ldrex)s(machInst, rt, rn, true, imm);
337 return new %(strexb)s(machInst, rd, rt, rn, true, 0);
339 return new %(strexh)s(machInst, rd, rt, rn, true, 0);
341 return new %(strexd)s(machInst, rd, rt,
344 return new Unknown(machInst);
349 return new Tbb(machInst, rn, rd);
351 return new Tbh(machInst, rn, rd);
353 return new %(ldrexb)s(machInst, rt, rn, true, 0);
355 return new %(ldrexh)s(machInst, rt, rn, true, 0);
357 return new %(ldrexd)s(machInst, rt, rt2, rn, true, 0);
359 return new Unknown(machInst);
364 const uint32_t puw = (bits(machInst, 24, 23) << 1) |
366 const uint32_t dimm = imm8 << 2;
367 if (bits(op2, 0) == 0) {
370 return new %(strd_w)s(machInst, rt, rt2, rn, false, dimm);
372 return new %(strd_uw)s(machInst, rt, rt2, rn, true, dimm);
374 return new %(strd_p)s(machInst, rt, rt2, rn, false, dimm);
376 return new %(strd_pw)s(machInst, rt, rt2, rn, false, dimm);
378 return new %(strd_pu)s(machInst, rt, rt2, rn, true, dimm);
380 return new %(strd_puw)s(machInst, rt, rt2, rn, true, dimm);
382 return new Unknown(machInst);
387 return new %(ldrd_w)s(machInst, rt, rt2, rn, false, dimm);
389 return new %(ldrd_uw)s(machInst, rt, rt2, rn, true, dimm);
391 return new %(ldrd_p)s(machInst, rt, rt2, rn, false, dimm);
393 return new %(ldrd_pw)s(machInst, rt, rt2, rn, false, dimm);
395 return new %(ldrd_pu)s(machInst, rt, rt2, rn, true, dimm);
397 return new %(ldrd_puw)s(machInst, rt, rt2, rn, true, dimm);
399 return new Unknown(machInst);
405 "ldrex" : "LDREX_" + loadImmClassName(False, True, False, size=4),
406 "ldrexb" : "LDREXB_" + loadImmClassName(False, True, False, size=1),
407 "ldrexh" : "LDREXH_" + loadImmClassName(False, True, False, size=2),
408 "ldrexd" : "LDREXD_" + loadDoubleImmClassName(False, True, False),
409 "strex" : "STREX_" + storeImmClassName(False, True, False, size=4),
410 "strexb" : "STREXB_" + storeImmClassName(False, True, False, size=1),
411 "strexh" : "STREXH_" + storeImmClassName(False, True, False, size=2),
412 "strexd" : "STREXD_" + storeDoubleImmClassName(False, True, False),
413 "ldrd_w" : loadDoubleImmClassName(True, False, True),
414 "ldrd_uw" : loadDoubleImmClassName(True, True, True),
415 "ldrd_p" : loadDoubleImmClassName(False, False, False),
416 "ldrd_pw" : loadDoubleImmClassName(False, False, True),
417 "ldrd_pu" : loadDoubleImmClassName(False, True, False),
418 "ldrd_puw" : loadDoubleImmClassName(False, True, True),
419 "strd_w" : storeDoubleImmClassName(True, False, True),
420 "strd_uw" : storeDoubleImmClassName(True, True, True),
421 "strd_p" : storeDoubleImmClassName(False, False, False),
422 "strd_pw" : storeDoubleImmClassName(False, False, True),
423 "strd_pu" : storeDoubleImmClassName(False, True, False),
424 "strd_puw" : storeDoubleImmClassName(False, True, True)
428 def format Thumb32LoadWord() {{
431 uint32_t op1 = bits(machInst, 24, 23);
432 if (bits(op1, 1) == 0) {
433 uint32_t op2 = bits(machInst, 11, 6);
436 return new %(literal_u)s(machInst, RT, INTREG_PC,
439 return new %(literal)s(machInst, RT, INTREG_PC,
442 } else if (op1 == 0x1) {
443 return new %(imm_pu)s(machInst, RT, RN, true, IMMED_11_0);
444 } else if (op2 == 0) {
445 return new %(register)s(machInst, RT, RN, UP,
446 bits(machInst, 5, 4), LSL, RM);
447 } else if ((op2 & 0x3c) == 0x38) {
448 return new %(ldrt)s(machInst, RT, RN, true, IMMED_7_0);
449 } else if ((op2 & 0x3c) == 0x30 || //P
450 (op2 & 0x24) == 0x24) { //W
451 uint32_t puw = bits(machInst, 10, 8);
452 uint32_t imm = IMMED_7_0;
456 // If we're here, either P or W must have been set.
457 panic("Neither P or W set, but that "
458 "shouldn't be possible.\\n");
460 return new %(imm_w)s(machInst, RT, RN, false, imm);
462 return new %(imm_uw)s(machInst, RT, RN, true, imm);
464 return new %(imm_p)s(machInst, RT, RN, false, imm);
466 return new %(imm_pw)s(machInst, RT, RN, false, imm);
468 return new %(imm_pu)s(machInst, RT, RN, true, imm);
470 return new %(imm_puw)s(machInst, RT, RN, true, imm);
474 return new Unknown(machInst);
479 "literal_u" : loadImmClassName(False, True, False),
480 "literal" : loadImmClassName(False, False, False),
481 "register" : loadRegClassName(False, True, False),
482 "ldrt" : loadImmClassName(False, True, False, user=True),
483 "imm_w" : loadImmClassName(True, False, True),
484 "imm_uw" : loadImmClassName(True, True, True),
485 "imm_p" : loadImmClassName(False, False, False),
486 "imm_pw" : loadImmClassName(False, False, True),
487 "imm_pu" : loadImmClassName(False, True, False),
488 "imm_puw" : loadImmClassName(False, True, True)
490 decode_block = decode % classNames
493 def format Thumb32StoreSingle() {{
494 def buildPuwDecode(size):
497 uint32_t puw = bits(machInst, 10, 8);
498 uint32_t imm = IMMED_7_0;
502 // If we're here, either P or W must have been set.
503 panic("Neither P or W set, but that "
504 "shouldn't be possible.\\n");
506 return new %(imm_w)s(machInst, RT, RN, false, imm);
508 return new %(imm_uw)s(machInst, RT, RN, true, imm);
510 return new %(imm_p)s(machInst, RT, RN, false, imm);
512 return new %(imm_pw)s(machInst, RT, RN, false, imm);
514 return new %(imm_pu)s(machInst, RT, RN, true, imm);
516 return new %(imm_puw)s(machInst, RT, RN, true, imm);
521 "imm_w" : storeImmClassName(True, False, True, size=size),
522 "imm_uw" : storeImmClassName(True, True, True, size=size),
523 "imm_p" : storeImmClassName(False, False, False, size=size),
524 "imm_pw" : storeImmClassName(False, False, True, size=size),
525 "imm_pu" : storeImmClassName(False, True, False, size=size),
526 "imm_puw" : storeImmClassName(False, True, True, size=size)
530 uint32_t op1 = bits(machInst, 23, 21);
531 uint32_t op2 = bits(machInst, 11, 6);
532 bool op2Puw = ((op2 & 0x24) == 0x24 ||
533 (op2 & 0x3c) == 0x30);
535 return new Unknown(machInst);
538 return new %(strb_imm)s(machInst, RT, RN, true, IMMED_11_0);
539 } else if (op1 == 0 && op2Puw) {
541 } else if (op1 == 0 && ((op2 & 0x3c) == 0x38)) {
542 return new %(strbt)s(machInst, RT, RN, true, IMMED_7_0);
543 } else if (op1 == 0 && op2 == 0) {
544 return new %(strb_reg)s(machInst, RT, RN, true,
545 bits(machInst, 5, 4), LSL, RM);
546 } else if (op1 == 5) {
547 return new %(strh_imm)s(machInst, RT, RN, true, IMMED_11_0);
548 } else if (op1 == 1 && op2Puw) {
550 } else if (op1 == 1 && ((op2 & 0x3c) == 0x38)) {
551 return new %(strht)s(machInst, RT, RN, true, IMMED_7_0);
552 } else if (op1 == 1 && op2 == 0) {
553 return new %(strh_reg)s(machInst, RT, RN, true,
554 bits(machInst, 5, 4), LSL, RM);
555 } else if (op1 == 6) {
556 return new %(str_imm)s(machInst, RT, RN, true, IMMED_11_0);
557 } else if (op1 == 2 && op2Puw) {
559 } else if (op1 == 2 && ((op2 & 0x3c) == 0x38)) {
560 return new %(strt)s(machInst, RT, RN, true, IMMED_7_0);
561 } else if (op1 == 2 && op2 == 0) {
562 return new %(str_reg)s(machInst, RT, RN, true,
563 bits(machInst, 5, 4), LSL, RM);
565 return new Unknown(machInst);
570 "strb_imm" : storeImmClassName(False, True, False, size=1),
571 "strb_puw" : buildPuwDecode(1),
572 "strbt" : storeImmClassName(False, True, False, user=True, size=1),
573 "strb_reg" : storeRegClassName(False, True, False, size=1),
574 "strh_imm" : storeImmClassName(False, True, False, size=2),
575 "strh_puw" : buildPuwDecode(2),
576 "strht" : storeImmClassName(False, True, False, user=True, size=2),
577 "strh_reg" : storeRegClassName(False, True, False, size=2),
578 "str_imm" : storeImmClassName(False, True, False),
579 "str_puw" : buildPuwDecode(4),
580 "strt" : storeImmClassName(False, True, False, user=True),
581 "str_reg" : storeRegClassName(False, True, False)
583 decode_block = decode % classNames
586 def format LoadByteMemoryHints() {{
589 const uint32_t op1 = bits(machInst, 24, 23);
590 const uint32_t op2 = bits(machInst, 11, 6);
591 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
592 const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
593 const IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
594 const uint32_t imm12 = bits(machInst, 11, 0);
595 const uint32_t imm8 = bits(machInst, 7, 0);
596 bool pldw = bits(machInst, 21);
597 const uint32_t imm2 = bits(machInst, 5, 4);
600 const bool add = bits(machInst, 23);
601 if (bits(op1, 1) == 1) {
603 return new %(pli_iulit)s(machInst, INTREG_ZERO,
604 INTREG_PC, true, imm12);
606 return new %(pli_ilit)s(machInst, INTREG_ZERO,
607 INTREG_PC, false, imm12);
611 return new %(pld_iulit)s(machInst, INTREG_ZERO,
612 INTREG_PC, true, imm12);
614 return new %(pld_ilit)s(machInst, INTREG_ZERO,
615 INTREG_PC, false, imm12);
619 if (bits(op1, 1) == 1) {
620 if (bits(machInst, 23)) {
621 return new %(ldrsb_lit_u)s(machInst, rt, INTREG_PC,
624 return new %(ldrsb_lit)s(machInst, rt, INTREG_PC,
628 if (bits(machInst, 23)) {
629 return new %(ldrb_lit_u)s(machInst, rt, INTREG_PC,
632 return new %(ldrb_lit)s(machInst, rt, INTREG_PC,
637 } else if (rt == 0xf) {
642 return new %(pldw_radd)s(machInst, INTREG_ZERO,
643 rn, true, imm2, LSL, rm);
645 return new %(pld_radd)s(machInst, INTREG_ZERO,
646 rn, true, imm2, LSL, rm);
648 } else if (bits(op2, 5, 2) == 0xc) {
650 return new %(pldw_isub)s(machInst, INTREG_ZERO,
653 return new %(pld_isub)s(machInst, INTREG_ZERO,
660 return new %(pldw_iadd)s(machInst, INTREG_ZERO,
663 return new %(pld_iadd)s(machInst, INTREG_ZERO,
668 return new %(pli_radd)s(machInst, INTREG_ZERO, rn,
669 true, imm2, LSL, rm);
670 } else if (bits(op2, 5, 2) == 0xc) {
671 return new %(pli_ilit)s(machInst, INTREG_ZERO,
672 INTREG_PC, false, imm8);
676 return new %(pli_iulit)s(machInst, INTREG_ZERO,
677 INTREG_PC, true, imm12);
679 return new Unknown(machInst);
684 return new %(ldrb_radd)s(machInst, rt, rn, true,
686 } else if (bits(op2, 5, 2) == 0xe) {
687 return new %(ldrbt)s(machInst, rt, rn, true, imm8);
688 } else if ((op2 & 0x24) == 0x24 || bits(op2, 5, 2) == 0xc) {
689 const uint32_t puw = bits(machInst, 10, 8);
692 return new %(ldrb_iw)s(machInst, rt,
695 return new %(ldrb_iuw)s(machInst, rt,
698 return new %(ldrb_ip)s(machInst, rt,
701 return new %(ldrb_ipw)s(machInst, rt,
704 return new %(ldrb_ipuw)s(machInst, rt,
710 return new %(ldrb_iadd)s(machInst, rt, rn, true, imm12);
713 return new %(ldrsb_radd)s(machInst, rt, rn, true,
715 } else if (bits(op2, 5, 2) == 0xe) {
716 return new %(ldrsbt)s(machInst, rt, rn, true, imm8);
717 } else if ((op2 & 0x24) == 0x24 || bits(op2, 5, 2) == 0xc) {
718 const uint32_t puw = bits(machInst, 10, 8);
721 return new %(ldrsb_iw)s(machInst, rt,
724 return new %(ldrsb_iuw)s(machInst, rt,
727 return new %(ldrsb_ip)s(machInst, rt,
730 return new %(ldrsb_ipw)s(machInst, rt,
733 return new %(ldrsb_ipuw)s(machInst, rt,
739 return new %(ldrsb_iadd)s(machInst, rt, rn, true, imm12);
741 return new Unknown(machInst);
746 "ldrsb_lit_u" : loadImmClassName(False, True, False, 1, True),
747 "ldrsb_lit" : loadImmClassName(False, False, False, 1, True),
748 "ldrb_lit_u" : loadImmClassName(False, True, False, 1),
749 "ldrb_lit" : loadImmClassName(False, False, False, 1),
750 "ldrsb_radd" : loadRegClassName(False, True, False, 1, True),
751 "ldrb_radd" : loadRegClassName(False, True, False, 1),
752 "ldrsb_iw" : loadImmClassName(True, False, True, 1, True),
753 "ldrsb_iuw" : loadImmClassName(True, True, True, 1, True),
754 "ldrsb_ip" : loadImmClassName(False, False, False, 1, True),
755 "ldrsb_ipw" : loadImmClassName(False, False, True, 1, True),
756 "ldrsb_ipuw" : loadImmClassName(False, True, True, 1, True),
757 "ldrsb_iadd" : loadImmClassName(False, True, False, 1, True),
758 "ldrb_iw" : loadImmClassName(True, False, True, 1),
759 "ldrb_iuw" : loadImmClassName(True, True, True, 1),
760 "ldrb_ip" : loadImmClassName(False, False, False, 1),
761 "ldrb_ipw" : loadImmClassName(False, False, True, 1),
762 "ldrb_ipuw" : loadImmClassName(False, True, True, 1),
763 "ldrb_iadd" : loadImmClassName(False, True, False, 1),
764 "ldrbt" : loadImmClassName(False, True, False, 1, user=True),
765 "ldrsbt" : loadImmClassName(False, True, False, 1, True, user=True),
766 "pldw_radd" : "PLDW_" + loadRegClassName(False, True, False, 1),
767 "pld_radd" : "PLD_" + loadRegClassName(False, True, False, 1),
768 "pldw_isub" : "PLDW_" + loadImmClassName(False, False, False, 1),
769 "pld_isub" : "PLD_" + loadImmClassName(False, False, False, 1),
770 "pldw_iadd" : "PLDW_" + loadImmClassName(False, True, False, 1),
771 "pld_iadd" : "PLD_" + loadImmClassName(False, True, False, 1),
772 "pld_iulit" : "PLD_" + loadImmClassName(False, True, False, 1),
773 "pld_ilit" : "PLD_" + loadImmClassName(False, False, False, 1),
774 "pli_iulit" : "PLI_" + loadImmClassName(False, True, False, 1),
775 "pli_ilit" : "PLI_" + loadImmClassName(False, False, False, 1),
776 "pli_radd" : "PLI_" + loadRegClassName(False, True, False, 1),
777 "pli_iulit" : "PLI_" + loadImmClassName(False, True, False, 1),
778 "pli_ilit" : "PLI_" + loadImmClassName(False, False, False, 1)
780 decode_block = decode % substDict
783 def format LoadHalfwordMemoryHints() {{
786 const uint32_t op1 = bits(machInst, 24, 23);
787 const uint32_t op2 = bits(machInst, 11, 6);
788 const IntRegIndex rn = (IntRegIndex)(uint32_t)bits(machInst, 19, 16);
789 const IntRegIndex rt = (IntRegIndex)(uint32_t)bits(machInst, 15, 12);
790 const IntRegIndex rm = (IntRegIndex)(uint32_t)bits(machInst, 3, 0);
791 const uint32_t imm12 = bits(machInst, 11, 0);
792 const uint32_t imm8 = bits(machInst, 7, 0);
793 bool pldw = bits(machInst, 21);
794 const uint32_t imm2 = bits(machInst, 5, 4);
797 if (bits(op1, 1) == 1) {
798 // Unallocated memory hint
799 return new NopInst(machInst);
801 return new Unknown(machInst);
804 if (bits(op1, 1) == 1) {
805 if (bits(machInst, 23)) {
806 return new %(ldrsh_lit_u)s(machInst, rt, INTREG_PC,
809 return new %(ldrsh_lit)s(machInst, rt, INTREG_PC,
813 if (bits(machInst, 23)) {
814 return new %(ldrh_lit_u)s(machInst, rt, INTREG_PC,
817 return new %(ldrh_lit)s(machInst, rt, INTREG_PC,
822 } else if (rt == 0xf) {
827 return new %(pldw_radd)s(machInst, INTREG_ZERO,
828 rn, true, imm2, LSL, rm);
830 return new %(pld_radd)s(machInst, INTREG_ZERO,
831 rn, true, imm2, LSL, rm);
833 } else if (bits(op2, 5, 2) == 0xc) {
835 return new %(pldw_isub)s(machInst, INTREG_ZERO,
838 return new %(pld_isub)s(machInst, INTREG_ZERO,
845 return new %(pldw_iadd)s(machInst, INTREG_ZERO,
848 return new %(pld_iadd)s(machInst, INTREG_ZERO,
852 if (op2 == 0x0 || bits(op2, 5, 2) == 0xc) {
853 // Unallocated memory hint
854 return new NopInst(machInst);
858 return new NopInst(machInst);
860 return new Unknown(machInst);
865 return new %(ldrh_radd)s(machInst, rt, rn, true,
867 } else if (bits(op2, 5, 2) == 0xe) {
868 return new %(ldrht)s(machInst, rt, rn, true, imm8);
869 } else if ((op2 & 0x24) == 0x24 || bits(op2, 5, 2) == 0xc) {
870 const uint32_t puw = bits(machInst, 10, 8);
873 return new %(ldrh_iw)s(machInst, rt,
876 return new %(ldrh_iuw)s(machInst, rt,
879 return new %(ldrh_ip)s(machInst, rt,
882 return new %(ldrh_ipw)s(machInst, rt,
885 return new %(ldrh_ipuw)s(machInst, rt,
891 return new %(ldrh_iadd)s(machInst, rt, rn, true, imm12);
894 return new %(ldrsh_radd)s(machInst, rt, rn, true,
896 } else if (bits(op2, 5, 2) == 0xe) {
897 return new %(ldrsht)s(machInst, rt, rn, true, imm8);
898 } else if ((op2 & 0x24) == 0x24 || bits(op2, 5, 2) == 0xc) {
899 const uint32_t puw = bits(machInst, 10, 8);
902 return new %(ldrsh_iw)s(machInst, rt,
905 return new %(ldrsh_iuw)s(machInst, rt,
908 return new %(ldrsh_ip)s(machInst, rt,
911 return new %(ldrsh_ipw)s(machInst, rt,
914 return new %(ldrsh_ipuw)s(machInst, rt,
920 return new %(ldrsh_iadd)s(machInst, rt, rn, true, imm12);
922 return new Unknown(machInst);
927 "ldrsh_lit_u" : loadImmClassName(False, True, False, 2, True),
928 "ldrsh_lit" : loadImmClassName(False, False, False, 2, True),
929 "ldrh_lit_u" : loadImmClassName(False, True, False, 2),
930 "ldrh_lit" : loadImmClassName(False, False, False, 2),
931 "ldrsh_radd" : loadRegClassName(False, True, False, 2, True),
932 "ldrh_radd" : loadRegClassName(False, True, False, 2),
933 "ldrsh_iw" : loadImmClassName(True, False, True, 2, True),
934 "ldrsh_iuw" : loadImmClassName(True, True, True, 2, True),
935 "ldrsh_ip" : loadImmClassName(False, False, False, 2, True),
936 "ldrsh_ipw" : loadImmClassName(False, False, True, 2, True),
937 "ldrsh_ipuw" : loadImmClassName(False, True, True, 2, True),
938 "ldrsh_iadd" : loadImmClassName(False, True, False, 2, True),
939 "ldrh_iw" : loadImmClassName(True, False, True, 2),
940 "ldrh_iuw" : loadImmClassName(True, True, True, 2),
941 "ldrh_ip" : loadImmClassName(False, False, False, 2),
942 "ldrh_ipw" : loadImmClassName(False, False, True, 2),
943 "ldrh_ipuw" : loadImmClassName(False, True, True, 2),
944 "ldrh_iadd" : loadImmClassName(False, True, False, 2),
945 "ldrht" : loadImmClassName(False, True, False, 2, user=True),
946 "ldrsht" : loadImmClassName(False, True, False, 2, True, user=True),
947 "pldw_radd" : "PLDW_" + loadRegClassName(False, True, False, 1),
948 "pld_radd" : "PLD_" + loadRegClassName(False, True, False, 1),
949 "pldw_isub" : "PLDW_" + loadImmClassName(False, False, False, 1),
950 "pld_isub" : "PLD_" + loadImmClassName(False, False, False, 1),
951 "pldw_iadd" : "PLDW_" + loadImmClassName(False, True, False, 1),
952 "pld_iadd" : "PLD_" + loadImmClassName(False, True, False, 1)
954 decode_block = decode % substDict
957 def format Thumb16MemReg() {{
960 const uint32_t opb = bits(machInst, 11, 9);
961 const uint32_t rt = bits(machInst, 2, 0);
962 const uint32_t rn = bits(machInst, 5, 3);
963 const uint32_t rm = bits(machInst, 8, 6);
966 return new %(str)s(machInst, rt, rn, true, 0, LSL, rm);
968 return new %(strh)s(machInst, rt, rn, true, 0, LSL, rm);
970 return new %(strb)s(machInst, rt, rn, true, 0, LSL, rm);
972 return new %(ldrsb)s(machInst, rt, rn, true, 0, LSL, rm);
974 return new %(ldr)s(machInst, rt, rn, true, 0, LSL, rm);
976 return new %(ldrh)s(machInst, rt, rn, true, 0, LSL, rm);
978 return new %(ldrb)s(machInst, rt, rn, true, 0, LSL, rm);
980 return new %(ldrsh)s(machInst, rt, rn, true, 0, LSL, rm);
985 "str" : storeRegClassName(False, True, False),
986 "strh" : storeRegClassName(False, True, False, size=2),
987 "strb" : storeRegClassName(False, True, False, size=1),
988 "ldrsb" : loadRegClassName(False, True, False, sign=True, size=1),
989 "ldr" : loadRegClassName(False, True, False),
990 "ldrh" : loadRegClassName(False, True, False, size=2),
991 "ldrb" : loadRegClassName(False, True, False, size=1),
992 "ldrsh" : loadRegClassName(False, True, False, sign=True, size=2),
994 decode_block = decode % classNames
997 def format Thumb16MemImm() {{
1000 const uint32_t opa = bits(machInst, 15, 12);
1001 const uint32_t opb = bits(machInst, 11, 9);
1002 const uint32_t lrt = bits(machInst, 2, 0);
1003 const uint32_t lrn = bits(machInst, 5, 3);
1004 const uint32_t hrt = bits(machInst, 10, 8);
1005 const uint32_t imm5 = bits(machInst, 10, 6);
1006 const uint32_t imm8 = bits(machInst, 7, 0);
1007 const bool load = bits(opb, 2);
1011 return new %(ldr)s(machInst, lrt, lrn, true, imm5 << 2);
1013 return new %(str)s(machInst, lrt, lrn, true, imm5 << 2);
1017 return new %(ldrb)s(machInst, lrt, lrn, true, imm5);
1019 return new %(strb)s(machInst, lrt, lrn, true, imm5);
1023 return new %(ldrh)s(machInst, lrt, lrn, true, imm5 << 1);
1025 return new %(strh)s(machInst, lrt, lrn, true, imm5 << 1);
1029 return new %(ldr)s(machInst, hrt, INTREG_SP, true, imm8 << 2);
1031 return new %(str)s(machInst, hrt, INTREG_SP, true, imm8 << 2);
1034 return new Unknown(machInst);
1039 "ldr" : loadImmClassName(False, True, False),
1040 "str" : storeImmClassName(False, True, False),
1041 "ldrh" : loadImmClassName(False, True, False, size=2),
1042 "strh" : storeImmClassName(False, True, False, size=2),
1043 "ldrb" : loadImmClassName(False, True, False, size=1),
1044 "strb" : storeImmClassName(False, True, False, size=1),
1046 decode_block = decode % classNames
1049 def format Thumb16MemLit() {{
1052 const uint32_t rt = bits(machInst, 10, 8);
1053 const uint32_t imm8 = bits(machInst, 7, 0);
1054 return new %s(machInst, rt, INTREG_PC, true, imm8 << 2);
1056 ''' % loadImmClassName(False, True, False)