src/arch/arm/isa/includes.isa

   1 // -*- mode:c++ -*-
   2
   3 // Copyright (c) 2010, 2012, 2017-2018 ARM Limited
   4 // All rights reserved
   5 //
   6 // The license below extends only to copyright in the software and shall
   7 // not be construed as granting a license to any other intellectual
   8 // property including but not limited to intellectual property relating
   9 // to a hardware implementation of the functionality of the software
  10 // licensed hereunder.  You may use the software subject to the license
  11 // terms below provided that you ensure that this notice is replicated
  12 // unmodified and in its entirety in all distributions of the software,
  13 // modified or unmodified, in source code or in binary form.
  14 //
  15 // Copyright (c) 2007-2008 The Florida State University
  16 // All rights reserved.
  17 //
  18 // Redistribution and use in source and binary forms, with or without
  19 // modification, are permitted provided that the following conditions are
  20 // met: redistributions of source code must retain the above copyright
  21 // notice, this list of conditions and the following disclaimer;
  22 // redistributions in binary form must reproduce the above copyright
  23 // notice, this list of conditions and the following disclaimer in the
  24 // documentation and/or other materials provided with the distribution;
  25 // neither the name of the copyright holders nor the names of its
  26 // contributors may be used to endorse or promote products derived from
  27 // this software without specific prior written permission.
  28 //
  29 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40 //
  41 // Authors: Stephen Hines
  42
  43 ////////////////////////////////////////////////////////////////////
  44 //
  45 // Output include file directives.
  46 //
  47
  48 output header {{
  49 #include <iostream>
  50 #include <sstream>
  51
  52 #include "arch/arm/insts/branch.hh"
  53 #include "arch/arm/insts/branch64.hh"
  54 #include "arch/arm/insts/crypto.hh"
  55 #include "arch/arm/insts/data64.hh"
  56 #include "arch/arm/insts/fplib.hh"
  57 #include "arch/arm/insts/macromem.hh"
  58 #include "arch/arm/insts/mem.hh"
  59 #include "arch/arm/insts/mem64.hh"
  60 #include "arch/arm/insts/misc.hh"
  61 #include "arch/arm/insts/misc64.hh"
  62 #include "arch/arm/insts/mult.hh"
  63 #include "arch/arm/insts/neon64_mem.hh"
  64 #include "arch/arm/insts/pred_inst.hh"
  65 #include "arch/arm/insts/pseudo.hh"
  66 #include "arch/arm/insts/static_inst.hh"
  67 #include "arch/arm/insts/sve.hh"
  68 #include "arch/arm/insts/sve_mem.hh"
  69 #include "arch/arm/insts/vfp.hh"
  70 #include "arch/arm/isa_traits.hh"
  71 #include "enums/DecoderFlavour.hh"
  72 #include "mem/packet.hh"
  73 #include "sim/faults.hh"
  74
  75 }};
  76
  77 output decoder {{
  78 #include <string>
  79
  80 #include <gem5/asm/generic/m5ops.h>
  81
  82 #include "arch/arm/decoder.hh"
  83 #include "arch/arm/faults.hh"
  84 #include "arch/arm/insts/sve_macromem.hh"
  85 #include "arch/arm/intregs.hh"
  86 #include "arch/arm/isa_traits.hh"
  87 #include "arch/arm/utility.hh"
  88 #include "base/cprintf.hh"
  89 #include "base/loader/symtab.hh"
  90 #include "cpu/thread_context.hh"
  91
  92 using namespace ArmISA;
  93 }};
  94
  95 output exec {{
  96 #include <cmath>
  97
  98 #include "arch/arm/faults.hh"
  99 #include "arch/arm/interrupts.hh"
 100 #include "arch/arm/isa.hh"
 101 #include "arch/arm/isa_traits.hh"
 102 #include "arch/arm/pauth_helpers.hh"
 103 #include "arch/arm/utility.hh"
 104 #include "arch/generic/memhelpers.hh"
 105 #include "base/condcodes.hh"
 106 #include "base/crc.hh"
 107 #include "cpu/base.hh"
 108 #include "sim/pseudo_inst.hh"
 109
 110 #if defined(linux)
 111 #include <fenv.h>
 112
 113 #endif
 114
 115 #include "base/cp_annotate.hh"
 116 #include "debug/Arm.hh"
 117 #include "mem/packet.hh"
 118 #include "mem/packet_access.hh"
 119 #include "sim/sim_exit.hh"
 120
 121 using namespace ArmISA;
 122
 123 }};
 124