arm: Delete authors lists from the arm files.
[gem5.git] / src / arch / arm / isa / insts / amo64.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2018 Metempsy Technology Consulting
4 // All rights reserved
5 //
6 // The license below extends only to copyright in the software and shall
7 // not be construed as granting a license to any other intellectual
8 // property including but not limited to intellectual property relating
9 // to a hardware implementation of the functionality of the software
10 // licensed hereunder. You may use the software subject to the license
11 // terms below provided that you ensure that this notice is replicated
12 // unmodified and in its entirety in all distributions of the software,
13 // modified or unmodified, in source code or in binary form.
14 //
15 // Redistribution and use in source and binary forms, with or without
16 // modification, are permitted provided that the following conditions are
17 // met: redistributions of source code must retain the above copyright
18 // notice, this list of conditions and the following disclaimer;
19 // redistributions in binary form must reproduce the above copyright
20 // notice, this list of conditions and the following disclaimer in the
21 // documentation and/or other materials provided with the distribution;
22 // neither the name of the copyright holders nor the names of its
23 // contributors may be used to endorse or promote products derived from
24 // this software without specific prior written permission.
25 //
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37
38 let {{
39
40 import math
41
42 OP_DICT = { "CAS" : 'if (a == *b){*b = c;}',
43 "SWP" : '*b = c;',
44 "ADD" : '*b += c;',
45 "EOR" : '*b ^= c;',
46 "CLR" : '*b &= ~c;',
47 "SET" : '*b |= c;',
48 "MAX" : '*b = std::max(*b, c);',
49 "MIN" : '*b = std::min(*b, c);', }
50
51 MASKS = { 1: 0xFF,
52 2: 0xFFFF,
53 4: 0xFFFFFFFF,
54 8: 0xFFFFFFFFFFFFFFFF,
55 }
56
57 header_output = ""
58 decoder_output = ""
59 exec_output = ""
60
61 class AtomicInst64(LoadStoreInst):
62 execBase = 'AtomicInst64'
63 micro = False
64
65 def __init__(self, mnem, Name, size=4, user=False, flavor="normal",
66 unsign=True, top = False, paired=False, ret_op=True):
67 super(AtomicInst64, self).__init__()
68
69 self.name= mnem
70 self.Name = Name
71 self.size = size
72 self.user = user
73 self.flavor = flavor
74 self.unsign = unsign
75 self.top = top
76 self.paired = paired
77
78 self.memFlags = ["ArmISA::TLB::MustBeOne"]
79 self.instFlags = ["IsAtomic"]
80 self.codeBlobs = { "postacc_code" : "" }
81 self.codeBlobs['usrDecl'] = ""
82
83 # Add memory request flags where necessary
84 if self.user:
85 self.memFlags.append("ArmISA::TLB::UserMode")
86
87 sz = self.size*2 if paired else self.size
88 self.memFlags.append("%d" % int(math.log(sz, 2)))
89
90 if self.micro:
91 self.instFlags.append("IsMicroop")
92
93 if self.flavor in ("release", "acquire_release", "acquire"):
94 self.instFlags.append("IsMemBarrier")
95 if self.flavor in ("release", "acquire_release"):
96 self.instFlags.append("IsWriteBarrier")
97 if self.flavor in ("acquire_release", "acquire"):
98 self.instFlags.append("IsReadBarrier")
99 if ret_op:
100 self.memFlags.append('Request::ATOMIC_RETURN_OP')
101 else:
102 self.memFlags.append('Request::ATOMIC_NO_RETURN_OP')
103
104 def emitHelper(self, base = 'Memory64', wbDecl = None, ):
105 global header_output, decoder_output, exec_output
106
107 # If this is a microop itself, don't allow anything that would
108 # require further microcoding.
109 if self.micro:
110 assert not wbDecl
111
112 sas_code = "3"
113 if self.size == 1 :
114 sas_code = "0"
115 elif self.size == 2:
116 sas_code = "1"
117 elif self.size == 4:
118 sas_code = "2"
119
120 if self.paired and sas_code == "3":
121 sas_code = "4"
122 if self.paired and sas_code == "2":
123 sas_code = "3"
124
125
126 fa_code = '''
127 fault->annotate(ArmFault::SAS, %s);
128 fault->annotate(ArmFault::SSE, %s);
129 fault->annotate(ArmFault::SRT, dest);
130 fault->annotate(ArmFault::SF, %s);
131 fault->annotate(ArmFault::AR, %s);
132 ''' % (sas_code,
133 "true" if not self.unsign else "false",
134 "true" if self.size == 8 else "false",
135 "true" if self.flavor != "normal" else "false")
136
137 (newHeader, newDecoder, newExec) = \
138 self.fillTemplates(self.name, self.Name, self.codeBlobs,
139 self.memFlags, self.instFlags,
140 base, wbDecl, faCode=fa_code)
141
142 header_output += newHeader
143 decoder_output += newDecoder
144 exec_output += newExec
145
146 def buildEACode(self):
147 # Address computation
148 eaCode = SPAlignmentCheckCode + "EA = XBase"
149 if self.size == 16:
150 if self.top:
151 eaCode += " + (isBigEndian64(xc->tcBase()) ? 0 : 8)"
152 else:
153 eaCode += " + (isBigEndian64(xc->tcBase()) ? 8 : 0)"
154 if not self.post:
155 eaCode += self.offset
156 eaCode += ";"
157 self.codeBlobs["ea_code"] = eaCode
158
159
160 class AtomicSingleOp(AtomicInst64):
161 decConstBase = 'AmoOp'
162 base = 'ArmISA::MemoryEx64'
163 writeback = True
164 post = False
165 execBase = 'AmoOp'
166
167 def __init__(self, *args, **kargs):
168 super(AtomicSingleOp, self).__init__(*args, **kargs)
169 self.suffix = buildMemSuffix(not self.unsign, self.size)
170 if self.size == 8:
171 self.res = 'XResult_ud' #if self.unsign else 'XResult_sd'
172 self.des = 'XDest_ud' #if self.unsign else 'XDest_sd'
173 self.tp = 'uint64_t' if self.unsign else 'int64_t'
174 self.utp = 'uint64_t'
175 self.suffix = '_sd' if not self.unsign else '_ud'
176 elif self.size == 4:
177 self.res = 'XResult_uw' #if self.unsign else 'XResult_sw'
178 self.des = 'XDest_uw' #if self.unsign else 'XDest_sw'
179 self.tp = 'uint32_t' if self.unsign else 'int32_t'
180 self.utp = 'uint32_t'
181 elif self.size == 2:
182 self.res = 'XResult_uh' #if self.unsign else 'XResult_sh'
183 self.des = 'XDest_uh' #if self.unsign else 'XDest_sh'
184 self.tp = 'uint16_t' if self.unsign else 'int16_t'
185 self.utp = 'uint16_t'
186 elif self.size == 1:
187 self.res = 'XResult_ub' #if self.unsign else 'XResult_sb'
188 self.des = 'XDest_ub' #if self.unsign else 'XDest_sb'
189 self.tp = 'uint8_t' if self.unsign else 'int8_t'
190 self.utp = 'uint8_t'
191 self.offset = ""
192 store_res = '''
193 %(result)s = cSwap(Mem%(suffix)s,
194 isBigEndian64(xc->tcBase()));
195 '''
196 store_res = store_res % {"result":self.res, "suffix":self.suffix}
197 self.codeBlobs["postacc_code"] = \
198 store_res + " SevMailbox = 1; LLSCLock = 0;"
199
200 def emit(self, op):
201 self.buildEACode()
202 usrDecl = "%(type)s valRs;\n" % {'type': self.tp}
203 self.codeBlobs['usrDecl'] = usrDecl
204
205 opcode = "valRs = cSwap(%(dest)s,"\
206 " isBigEndian64(xc->tcBase()));\n"
207 opcode += "TypedAtomicOpFunctor<%(type)s> *amo_op = "\
208 "new AtomicGeneric3Op<%(type)s>(Mem%(suffix)s,"\
209 " valRs, [](%(type)s* b, %(type)s a,"\
210 " %(type)s c){ %(op)s });\n"
211
212 opcode = opcode % {"suffix": self.suffix,
213 "type": self.tp ,
214 "dest": self.des,
215 "op": op}
216 self.codeBlobs['amo_code'] = opcode
217 accCode = "Mem%(suffix)s = cSwap(%(result)s,"\
218 " isBigEndian64(xc->tcBase()));"
219 accCode = accCode % { "result": self.res, "type":self.tp,
220 "suffix": self.suffix}
221 self.codeBlobs["memacc_code"] = accCode
222 self.emitHelper(self.base)
223
224
225 AtomicSingleOp("cas", "CAS64", 8, unsign=True,
226 flavor="normal").emit(OP_DICT['CAS'])
227 AtomicSingleOp("casa", "CASA64", 8, unsign=True,
228 flavor="acquire").emit(OP_DICT['CAS'])
229 AtomicSingleOp("casal", "CASAL64", 8, unsign=True,
230 flavor="acquire_release").emit(OP_DICT['CAS'])
231 AtomicSingleOp("casl", "CASL64", 8, unsign=True,
232 flavor="release").emit(OP_DICT['CAS'])
233
234 AtomicSingleOp("casb", "CASB", 1, unsign=True,
235 flavor="normal").emit(OP_DICT['CAS'])
236 AtomicSingleOp("casab", "CASAB", 1, unsign=True,
237 flavor="acquire").emit(OP_DICT['CAS'])
238 AtomicSingleOp("casalb", "CASALB", 1, unsign=True,
239 flavor="acquire_release").emit(OP_DICT['CAS'])
240 AtomicSingleOp("caslb", "CASLB", 1, unsign=True,
241 flavor="release").emit(OP_DICT['CAS'])
242
243 AtomicSingleOp("cash", "CASH", 2, unsign=True,
244 flavor="normal").emit(OP_DICT['CAS'])
245 AtomicSingleOp("casah", "CASAH", 2, unsign=True,
246 flavor="acquire").emit(OP_DICT['CAS'])
247 AtomicSingleOp("casalh", "CASALH", 2, unsign=True,
248 flavor="acquire_release").emit(OP_DICT['CAS'])
249 AtomicSingleOp("caslh", "CASLH", 2, unsign=True,
250 flavor="release").emit(OP_DICT['CAS'])
251
252 AtomicSingleOp("cas", "CAS32", 4, unsign=True,
253 flavor="normal").emit(OP_DICT['CAS'])
254 AtomicSingleOp("casa", "CASA32", 4, unsign=True,
255 flavor="acquire").emit(OP_DICT['CAS'])
256 AtomicSingleOp("casal", "CASAL32", 4, unsign=True,
257 flavor="acquire_release").emit(OP_DICT['CAS'])
258 AtomicSingleOp("casl", "CASL32", 4, unsign=True,
259 flavor="release").emit(OP_DICT['CAS'])
260
261 class CasPair64(AtomicInst64):
262 decConstBase = 'AmoPairOp'
263 base = 'ArmISA::MemoryEx64'
264 writeback = True
265 post = False
266 execBase = 'AmoOp'
267
268 def __init__(self, *args, **kargs):
269 super(CasPair64, self).__init__(*args, **kargs)
270 self.paired = True
271 self.offset = ""
272 if self.size == 8:
273 self.res = 'XResult_ud'
274 self.des = 'XDest_ud'
275 self.tp = 'std::array<uint64_t, 2>'
276 self.suffix = "_tud"
277 store_res = '''
278 %(result)s = cSwap(Mem%(suffix)s[0],
279 isBigEndian64(xc->tcBase()));
280 uint64_t result2 = cSwap(Mem%(suffix)s[1],
281 isBigEndian64(xc->tcBase()));
282 xc->setIntRegOperand(this, r2_dst, (result2)
283 & mask(aarch64 ? 64 : 32));
284 '''
285 elif self.size == 4:
286 self.res = 'Result_uw'
287 self.des = 'WDest_uw'
288 self.tp = 'uint64_t'
289 self.suffix = "_ud"
290 store_res = '''
291 uint64_t data = cSwap(Mem%(suffix)s,
292 isBigEndian64(xc->tcBase()));
293 %(result)s = isBigEndian64(xc->tcBase())
294 ? (data >> 32)
295 : (uint32_t)data;
296 uint32_t result2 = isBigEndian64(xc->tcBase())
297 ? (uint32_t)data
298 : (data >> 32);
299 xc->setIntRegOperand(this, r2_dst, (result2) &
300 mask(aarch64 ? 64 : 32));
301 '''
302
303 store_res = store_res % {"result":self.res, "suffix":self.suffix}
304 usrDecl = "%(type)s valRs;\n" % {'type': self.tp}
305 self.codeBlobs['usrDecl'] = usrDecl
306 self.codeBlobs["postacc_code"] = \
307 store_res + " SevMailbox = 1; LLSCLock = 0;"
308
309 def emit(self):
310 self.buildEACode()
311
312 # Code that actually handles the access
313
314 if self.size == 4:
315 accCode = \
316 "uint32_t result2 = ((xc->readIntRegOperand(this, r2_src))"\
317 " & mask(aarch64 ? 64 : 32)) ;\n"\
318 " uint32_t dest2 = ((xc->readIntRegOperand(this, d2_src)) "\
319 " & mask(aarch64 ? 64 : 32)) ;"
320 accCode += '''
321 uint64_t data = dest2;
322 data = isBigEndian64(xc->tcBase())
323 ? ((uint64_t(WDest_uw) << 32) | data)
324 : ((data << 32) | WDest_uw);
325 valRs = cSwap(data, isBigEndian64(xc->tcBase()));
326 uint64_t data2 = result2 ;
327 data2 = isBigEndian64(xc->tcBase())
328 ? ((uint64_t(Result_uw) << 32) | data2)
329 : ((data2 << 32) | Result_uw);
330 Mem_ud = cSwap(data2, isBigEndian64(xc->tcBase()));
331 '''
332
333 opcode = "TypedAtomicOpFunctor<%(type)s> *amo_op = "\
334 "new AtomicGeneric3Op<%(type)s>(Mem%(suffix)s,"\
335 " valRs, [](%(type)s* b, %(type)s a,"\
336 " %(type)s c){ %(op)s });\n"
337
338 elif self.size == 8:
339 accCode = ""\
340 "uint64_t result2 = ((xc->readIntRegOperand(this, r2_src))"\
341 " & mask(aarch64 ? 64 : 32)) ;\n"\
342 " uint64_t dest2 = ((xc->readIntRegOperand(this, d2_src)) "\
343 " & mask(aarch64 ? 64 : 32)) ;"
344 accCode += '''
345 // This temporary needs to be here so that the parser
346 // will correctly identify this instruction as a store.
347 std::array<uint64_t, 2> temp;
348 temp[0] = cSwap(XDest_ud,isBigEndian64(xc->tcBase()));
349 temp[1] = cSwap(dest2,isBigEndian64(xc->tcBase()));
350 valRs = temp;
351 std::array<uint64_t, 2> temp2;
352 temp2[0] = cSwap(XResult_ud,isBigEndian64(xc->tcBase()));
353 temp2[1] = cSwap(result2,isBigEndian64(xc->tcBase()));
354 Mem_tud = temp2;
355 '''
356
357 opcode = "TypedAtomicOpFunctor<uint64_t> *amo_op = "\
358 "new AtomicGenericPair3Op<uint64_t>(Mem_tud, "\
359 "valRs, [](uint64_t* b, std::array<uint64_t,2> a,"\
360 '''
361 std::array<uint64_t,2> c){
362 if(a[0]==b[0] && a[1]==b[1]){
363 b[0] = c[0]; b[1] = c[1];
364 }
365 });'''
366
367 opcode = opcode % { "suffix" : self.suffix,
368 "type": self.tp,
369 "op": OP_DICT['CAS']}
370 self.codeBlobs['amo_code'] = opcode
371 self.codeBlobs["memacc_code"] = accCode % {"type": self.tp}
372
373 # Push it out to the output files
374 self.emitHelper(self.base)
375
376 CasPair64("casp", "CASP64", 8, flavor="normal", paired=True).emit()
377 CasPair64("caspa", "CASPA64", 8, flavor="acquire", paired=True).emit()
378 CasPair64("caspal", "CASPAL64", 8, flavor="acquire_release",
379 paired=True).emit()
380 CasPair64("caspl", "CASPL64", 8, flavor="release", paired=True).emit()
381
382 CasPair64("casp", "CASP32", 4, flavor="normal", paired=True).emit()
383 CasPair64("caspa", "CASPA32", 4, flavor="acquire", paired=True).emit()
384 CasPair64("caspal", "CASPAL32", 4, flavor="acquire_release",
385 paired=True).emit()
386 CasPair64("caspl", "CASPL32", 4, flavor="release", paired=True).emit()
387
388 #Set of LD<OP> atomic instructions
389
390 class AtomicArithmeticSingleOp(AtomicSingleOp):
391 decConstBase = 'AmoArithmeticOp'
392 base = 'ArmISA::MemoryEx64'
393 writeback = True
394 post = False
395 execBase = 'AmoOp'
396
397 def __init__(self, *args, **kargs):
398 super(AtomicArithmeticSingleOp, self).__init__(*args, **kargs)
399 store_res = "%(utype)s unsMem = Mem%(suffix)s"
400
401 if self.size != 8:
402 store_res += " & %(mask)s"
403
404 store_res += ";\n"
405 store_res += ''' if (!isXZR) %(dest)s = cSwap(unsMem,
406 isBigEndian64(xc->tcBase()));
407 '''
408 store_res = store_res % { "dest": self.des, "suffix":self.suffix,
409 "mask": MASKS[self.size], "utype": self.utp}
410 self.codeBlobs["postacc_code"] = \
411 store_res + " SevMailbox = 1; LLSCLock = 0;"
412
413 def emit(self, op):
414 self.buildEACode()
415
416 opcode = "%(type)s val = cSwap(%(result)s,"\
417 " isBigEndian64(xc->tcBase()));\n"
418 opcode += "TypedAtomicOpFunctor<%(type)s> *amo_op = "\
419 "new AtomicGeneric3Op<%(type)s>(Mem%(suffix)s,"\
420 " val, [](%(type)s* b, %(type)s a,"\
421 " %(type)s c){ %(op)s });\n"
422
423 opcode = opcode % { "suffix" : self.suffix,
424 "type": self.tp , "result": self.res, "op": op}
425 self.codeBlobs['amo_code'] = opcode
426 accCode = "Mem%(suffix)s = cSwap(%(dest)s,"\
427 "isBigEndian64(xc->tcBase()));"
428 accCode = accCode % { "dest": self.des, "suffix":self.suffix}
429 self.codeBlobs["memacc_code"] = accCode
430 self.emitHelper(self.base)
431
432
433 AtomicArithmeticSingleOp("ldaddb", "LDADDB", 1, unsign=True,
434 flavor="normal").emit(OP_DICT['ADD'])
435 AtomicArithmeticSingleOp("ldaddlb", "LDADDLB", 1, unsign=True,
436 flavor="release").emit(OP_DICT['ADD'])
437 AtomicArithmeticSingleOp("ldaddab", "LDADDAB", 1, unsign=True,
438 flavor="acquire").emit(OP_DICT['ADD'])
439 AtomicArithmeticSingleOp("ldaddlab", "LDADDLAB", 1, unsign=True,
440 flavor="acquire_release").emit(OP_DICT['ADD'])
441 AtomicArithmeticSingleOp("ldaddh", "LDADDH", 2, unsign=True,
442 flavor="normal").emit(OP_DICT['ADD'])
443 AtomicArithmeticSingleOp("ldaddlh", "LDADDLH", 2, unsign=True,
444 flavor="release").emit(OP_DICT['ADD'])
445 AtomicArithmeticSingleOp("ldaddah", "LDADDAH", 2, unsign=True,
446 flavor="acquire").emit(OP_DICT['ADD'])
447 AtomicArithmeticSingleOp("ldaddlah", "LDADDLAH", 2, unsign=True,
448 flavor="acquire_release").emit(OP_DICT['ADD'])
449 AtomicArithmeticSingleOp("ldadd", "LDADD", 4, unsign=True,
450 flavor="normal").emit(OP_DICT['ADD'])
451 AtomicArithmeticSingleOp("ldaddl", "LDADDL", 4, unsign=True,
452 flavor="release").emit(OP_DICT['ADD'])
453 AtomicArithmeticSingleOp("ldadda", "LDADDA", 4, unsign=True,
454 flavor="acquire").emit(OP_DICT['ADD'])
455 AtomicArithmeticSingleOp("ldaddla", "LDADDLA", 4, unsign=True,
456 flavor="acquire_release").emit(OP_DICT['ADD'])
457 AtomicArithmeticSingleOp("ldadd64", "LDADD64", 8, unsign=True,
458 flavor="normal").emit(OP_DICT['ADD'])
459 AtomicArithmeticSingleOp("ldaddl64", "LDADDL64", 8, unsign=True,
460 flavor="release").emit(OP_DICT['ADD'])
461 AtomicArithmeticSingleOp("ldadda64", "LDADDA64", 8, unsign=True,
462 flavor="acquire").emit(OP_DICT['ADD'])
463 AtomicArithmeticSingleOp("ldaddla64", "LDADDLA64", 8, unsign=True,
464 flavor="acquire_release").emit(OP_DICT['ADD'])
465
466 AtomicArithmeticSingleOp("ldclrb", "LDCLRB", 1, unsign=True,
467 flavor="normal").emit(OP_DICT['CLR'])
468 AtomicArithmeticSingleOp("ldclrlb", "LDCLRLB", 1, unsign=True,
469 flavor="release").emit(OP_DICT['CLR'])
470 AtomicArithmeticSingleOp("ldclrab", "LDCLRAB", 1, unsign=True,
471 flavor="acquire").emit(OP_DICT['CLR'])
472 AtomicArithmeticSingleOp("ldclrlab", "LDCLRLAB", 1, unsign=True,
473 flavor="acquire_release").emit(OP_DICT['CLR'])
474 AtomicArithmeticSingleOp("ldclrh", "LDCLRH", 2, unsign=True,
475 flavor="normal").emit(OP_DICT['CLR'])
476 AtomicArithmeticSingleOp("ldclrlh", "LDCLRLH", 2, unsign=True,
477 flavor="release").emit(OP_DICT['CLR'])
478 AtomicArithmeticSingleOp("ldclrah", "LDCLRAH", 2, unsign=True,
479 flavor="acquire").emit(OP_DICT['CLR'])
480 AtomicArithmeticSingleOp("ldclrlah", "LDCLRLAH", 2, unsign=True,
481 flavor="acquire_release").emit(OP_DICT['CLR'])
482 AtomicArithmeticSingleOp("ldclr", "LDCLR", 4, unsign=True,
483 flavor="normal").emit(OP_DICT['CLR'])
484 AtomicArithmeticSingleOp("ldclrl", "LDCLRL", 4, unsign=True,
485 flavor="release").emit(OP_DICT['CLR'])
486 AtomicArithmeticSingleOp("ldclra", "LDCLRA", 4, unsign=True,
487 flavor="acquire").emit(OP_DICT['CLR'])
488 AtomicArithmeticSingleOp("ldclrla", "LDCLRLA", 4, unsign=True,
489 flavor="acquire_release").emit(OP_DICT['CLR'])
490 AtomicArithmeticSingleOp("ldclr64", "LDCLR64", 8, unsign=True,
491 flavor="normal").emit(OP_DICT['CLR'])
492 AtomicArithmeticSingleOp("ldclrl64", "LDCLRL64", 8, unsign=True,
493 flavor="release").emit(OP_DICT['CLR'])
494 AtomicArithmeticSingleOp("ldclra64", "LDCLRA64", 8, unsign=True,
495 flavor="acquire").emit(OP_DICT['CLR'])
496 AtomicArithmeticSingleOp("ldclrla64", "LDCLRLA64", 8, unsign=True,
497 flavor="acquire_release").emit(OP_DICT['CLR'])
498
499 AtomicArithmeticSingleOp("ldeorb", "LDEORB", 1, unsign=True,
500 flavor="normal").emit(OP_DICT['EOR'])
501 AtomicArithmeticSingleOp("ldeorlb", "LDEORLB", 1, unsign=True,
502 flavor="release").emit(OP_DICT['EOR'])
503 AtomicArithmeticSingleOp("ldeorab", "LDEORAB", 1, unsign=True,
504 flavor="acquire").emit(OP_DICT['EOR'])
505 AtomicArithmeticSingleOp("ldeorlab", "LDEORLAB", 1, unsign=True,
506 flavor="acquire_release").emit(OP_DICT['EOR'])
507 AtomicArithmeticSingleOp("ldeorh", "LDEORH", 2, unsign=True,
508 flavor="normal").emit(OP_DICT['EOR'])
509 AtomicArithmeticSingleOp("ldeorlh", "LDEORLH", 2, unsign=True,
510 flavor="release").emit(OP_DICT['EOR'])
511 AtomicArithmeticSingleOp("ldeorah", "LDEORAH", 2, unsign=True,
512 flavor="acquire").emit(OP_DICT['EOR'])
513 AtomicArithmeticSingleOp("ldeorlah", "LDEORLAH", 2, unsign=True,
514 flavor="acquire_release").emit(OP_DICT['EOR'])
515 AtomicArithmeticSingleOp("ldeor", "LDEOR", 4, unsign=True,
516 flavor="normal").emit(OP_DICT['EOR'])
517 AtomicArithmeticSingleOp("ldeorl", "LDEORL", 4, unsign=True,
518 flavor="release").emit(OP_DICT['EOR'])
519 AtomicArithmeticSingleOp("ldeora", "LDEORA", 4, unsign=True,
520 flavor="acquire").emit(OP_DICT['EOR'])
521 AtomicArithmeticSingleOp("ldeorla", "LDEORLA", 4, unsign=True,
522 flavor="acquire_release").emit(OP_DICT['EOR'])
523 AtomicArithmeticSingleOp("ldeor64", "LDEOR64", 8, unsign=True,
524 flavor="normal").emit(OP_DICT['EOR'])
525 AtomicArithmeticSingleOp("ldeorl64", "LDEORL64", 8, unsign=True,
526 flavor="release").emit(OP_DICT['EOR'])
527 AtomicArithmeticSingleOp("ldeora64", "LDEORA64", 8, unsign=True,
528 flavor="acquire").emit(OP_DICT['EOR'])
529 AtomicArithmeticSingleOp("ldeorla64", "LDEORLA64", 8, unsign=True,
530 flavor="acquire_release").emit(OP_DICT['EOR'])
531
532 AtomicArithmeticSingleOp("ldsetb", "LDSETB", 1, unsign=True,
533 flavor="normal").emit(OP_DICT['SET'])
534 AtomicArithmeticSingleOp("ldsetlb", "LDSETLB", 1, unsign=True,
535 flavor="release").emit(OP_DICT['SET'])
536 AtomicArithmeticSingleOp("ldsetab", "LDSETAB", 1, unsign=True,
537 flavor="acquire").emit(OP_DICT['SET'])
538 AtomicArithmeticSingleOp("ldsetlab", "LDSETLAB", 1, unsign=True,
539 flavor="acquire_release").emit(OP_DICT['SET'])
540 AtomicArithmeticSingleOp("ldseth", "LDSETH", 2, unsign=True,
541 flavor="normal").emit(OP_DICT['SET'])
542 AtomicArithmeticSingleOp("ldsetlh", "LDSETLH", 2, unsign=True,
543 flavor="release").emit(OP_DICT['SET'])
544 AtomicArithmeticSingleOp("ldsetah", "LDSETAH", 2, unsign=True,
545 flavor="acquire").emit(OP_DICT['SET'])
546 AtomicArithmeticSingleOp("ldsetlah", "LDSETLAH", 2, unsign=True,
547 flavor="acquire_release").emit(OP_DICT['SET'])
548 AtomicArithmeticSingleOp("ldset", "LDSET", 4, unsign=True,
549 flavor="normal").emit(OP_DICT['SET'])
550 AtomicArithmeticSingleOp("ldsetl", "LDSETL", 4, unsign=True,
551 flavor="release").emit(OP_DICT['SET'])
552 AtomicArithmeticSingleOp("ldseta", "LDSETA", 4, unsign=True,
553 flavor="acquire").emit(OP_DICT['SET'])
554 AtomicArithmeticSingleOp("ldsetla", "LDSETLA", 4, unsign=True,
555 flavor="acquire_release").emit(OP_DICT['SET'])
556 AtomicArithmeticSingleOp("ldset64", "LDSET64", 8, unsign=True,
557 flavor="normal").emit(OP_DICT['SET'])
558 AtomicArithmeticSingleOp("ldsetl64", "LDSETL64", 8, unsign=True,
559 flavor="release").emit(OP_DICT['SET'])
560 AtomicArithmeticSingleOp("ldseta64", "LDSETA64", 8, unsign=True,
561 flavor="acquire").emit(OP_DICT['SET'])
562 AtomicArithmeticSingleOp("ldsetla64", "LDSETLA64", 8, unsign=True,
563 flavor="acquire_release").emit(OP_DICT['SET'])
564
565 AtomicArithmeticSingleOp("ldsmaxb", "LDSMAXB", 1, unsign=False,
566 flavor="normal").emit(OP_DICT['MAX'])
567 AtomicArithmeticSingleOp("ldsmaxlb", "LDSMAXLB", 1, unsign=False,
568 flavor="release").emit(OP_DICT['MAX'])
569 AtomicArithmeticSingleOp("ldsmaxab", "LDSMAXAB", 1, unsign=False,
570 flavor="acquire").emit(OP_DICT['MAX'])
571 AtomicArithmeticSingleOp("ldsmaxlab", "LDSMAXLAB", 1, unsign=False,
572 flavor="acquire_release").emit(OP_DICT['MAX'])
573 AtomicArithmeticSingleOp("ldsmaxh", "LDSMAXH", 2, unsign=False,
574 flavor="normal").emit(OP_DICT['MAX'])
575 AtomicArithmeticSingleOp("ldsmaxlh", "LDSMAXLH", 2, unsign=False,
576 flavor="release").emit(OP_DICT['MAX'])
577 AtomicArithmeticSingleOp("ldsmaxah", "LDSMAXAH", 2, unsign=False,
578 flavor="acquire").emit(OP_DICT['MAX'])
579 AtomicArithmeticSingleOp("ldsmaxlah", "LDSMAXLAH", 2, unsign=False,
580 flavor="acquire_release").emit(OP_DICT['MAX'])
581 AtomicArithmeticSingleOp("ldsmax", "LDSMAX", 4, unsign=False,
582 flavor="normal").emit(OP_DICT['MAX'])
583 AtomicArithmeticSingleOp("ldsmaxl", "LDSMAXL", 4, unsign=False,
584 flavor="release").emit(OP_DICT['MAX'])
585 AtomicArithmeticSingleOp("ldsmaxa", "LDSMAXA", 4, unsign=False,
586 flavor="acquire").emit(OP_DICT['MAX'])
587 AtomicArithmeticSingleOp("ldsmaxla", "LDSMAXLA", 4, unsign=False,
588 flavor="acquire_release").emit(OP_DICT['MAX'])
589 AtomicArithmeticSingleOp("ldsmax64", "LDSMAX64", 8, unsign=False,
590 flavor="normal").emit(OP_DICT['MAX'])
591 AtomicArithmeticSingleOp("ldsmaxl64", "LDSMAXL64", 8, unsign=False,
592 flavor="release").emit(OP_DICT['MAX'])
593 AtomicArithmeticSingleOp("ldsmaxa64", "LDSMAXA64", 8, unsign=False,
594 flavor="acquire").emit(OP_DICT['MAX'])
595 AtomicArithmeticSingleOp("ldsmaxla64", "LDSMAXLA64", 8, unsign=False,
596 flavor="acquire_release").emit(OP_DICT['MAX'])
597
598 AtomicArithmeticSingleOp("ldsminb", "LDSMINB", 1, unsign=False,
599 flavor="normal").emit(OP_DICT['MIN'])
600 AtomicArithmeticSingleOp("ldsminlb", "LDSMINLB", 1, unsign=False,
601 flavor="release").emit(OP_DICT['MIN'])
602 AtomicArithmeticSingleOp("ldsminab", "LDSMINAB", 1, unsign=False,
603 flavor="acquire").emit(OP_DICT['MIN'])
604 AtomicArithmeticSingleOp("ldsminlab", "LDSMINLAB", 1, unsign=False,
605 flavor="acquire_release").emit(OP_DICT['MIN'])
606 AtomicArithmeticSingleOp("ldsminh", "LDSMINH", 2, unsign=False,
607 flavor="normal").emit(OP_DICT['MIN'])
608 AtomicArithmeticSingleOp("ldsminlh", "LDSMINLH", 2, unsign=False,
609 flavor="release").emit(OP_DICT['MIN'])
610 AtomicArithmeticSingleOp("ldsminah", "LDSMINAH", 2, unsign=False,
611 flavor="acquire").emit(OP_DICT['MIN'])
612 AtomicArithmeticSingleOp("ldsminlah", "LDSMINLAH", 2, unsign=False,
613 flavor="acquire_release").emit(OP_DICT['MIN'])
614 AtomicArithmeticSingleOp("ldsmin", "LDSMIN", 4, unsign=False,
615 flavor="normal").emit(OP_DICT['MIN'])
616 AtomicArithmeticSingleOp("ldsminl", "LDSMINL", 4, unsign=False,
617 flavor="release").emit(OP_DICT['MIN'])
618 AtomicArithmeticSingleOp("ldsmina", "LDSMINA", 4, unsign=False,
619 flavor="acquire").emit(OP_DICT['MIN'])
620 AtomicArithmeticSingleOp("ldsminla", "LDSMINLA", 4, unsign=False,
621 flavor="acquire_release").emit(OP_DICT['MIN'])
622 AtomicArithmeticSingleOp("ldsmin64", "LDSMIN64", 8, unsign=False,
623 flavor="normal").emit(OP_DICT['MIN'])
624 AtomicArithmeticSingleOp("ldsminl64", "LDSMINL64", 8, unsign=False,
625 flavor="release").emit(OP_DICT['MIN'])
626 AtomicArithmeticSingleOp("ldsmina64", "LDSMINA64", 8, unsign=False,
627 flavor="acquire").emit(OP_DICT['MIN'])
628 AtomicArithmeticSingleOp("ldsminla64", "LDSMINLA64", 8, unsign=False,
629 flavor="acquire_release").emit(OP_DICT['MIN'])
630
631 AtomicArithmeticSingleOp("ldumaxb", "LDUMAXB", 1, unsign=True,
632 flavor="normal").emit(OP_DICT['MAX'])
633 AtomicArithmeticSingleOp("ldumaxlb", "LDUMAXLB", 1, unsign=True,
634 flavor="release").emit(OP_DICT['MAX'])
635 AtomicArithmeticSingleOp("ldumaxab", "LDUMAXAB", 1, unsign=True,
636 flavor="acquire").emit(OP_DICT['MAX'])
637 AtomicArithmeticSingleOp("ldumaxlab", "LDUMAXLAB", 1, unsign=True,
638 flavor="acquire_release").emit(OP_DICT['MAX'])
639 AtomicArithmeticSingleOp("ldumaxh", "LDUMAXH", 2, unsign=True,
640 flavor="normal").emit(OP_DICT['MAX'])
641 AtomicArithmeticSingleOp("ldumaxlh", "LDUMAXLH", 2, unsign=True,
642 flavor="release").emit(OP_DICT['MAX'])
643 AtomicArithmeticSingleOp("ldumaxah", "LDUMAXAH", 2, unsign=True,
644 flavor="acquire").emit(OP_DICT['MAX'])
645 AtomicArithmeticSingleOp("ldumaxlah", "LDUMAXLAH", 2, unsign=True,
646 flavor="acquire_release").emit(OP_DICT['MAX'])
647 AtomicArithmeticSingleOp("ldumax", "LDUMAX", 4, unsign=True,
648 flavor="normal").emit(OP_DICT['MAX'])
649 AtomicArithmeticSingleOp("ldumaxl", "LDUMAXL", 4, unsign=True,
650 flavor="release").emit(OP_DICT['MAX'])
651 AtomicArithmeticSingleOp("ldumaxa", "LDUMAXA", 4, unsign=True,
652 flavor="acquire").emit(OP_DICT['MAX'])
653 AtomicArithmeticSingleOp("ldumaxla", "LDUMAXLA", 4, unsign=True,
654 flavor="acquire_release").emit(OP_DICT['MAX'])
655 AtomicArithmeticSingleOp("ldumax64", "LDUMAX64", 8, unsign=True,
656 flavor="normal").emit(OP_DICT['MAX'])
657 AtomicArithmeticSingleOp("ldumaxl64", "LDUMAXL64", 8, unsign=True,
658 flavor="release").emit(OP_DICT['MAX'])
659 AtomicArithmeticSingleOp("ldumaxa64", "LDUMAXA64", 8, unsign=True,
660 flavor="acquire").emit(OP_DICT['MAX'])
661 AtomicArithmeticSingleOp("ldumaxla64", "LDUMAXLA64", 8, unsign=True,
662 flavor="acquire_release").emit(OP_DICT['MAX'])
663
664
665 AtomicArithmeticSingleOp("lduminb", "LDUMINB", 1, unsign=True,
666 flavor="normal").emit(OP_DICT['MIN'])
667 AtomicArithmeticSingleOp("lduminlb", "LDUMINLB", 1, unsign=True,
668 flavor="release").emit(OP_DICT['MIN'])
669 AtomicArithmeticSingleOp("lduminab", "LDUMINAB", 1, unsign=True,
670 flavor="acquire").emit(OP_DICT['MIN'])
671 AtomicArithmeticSingleOp("lduminlab", "LDUMINLAB", 1, unsign=True,
672 flavor="acquire_release").emit(OP_DICT['MIN'])
673 AtomicArithmeticSingleOp("lduminh", "LDUMINH", 2, unsign=True,
674 flavor="normal").emit(OP_DICT['MIN'])
675 AtomicArithmeticSingleOp("lduminlh", "LDUMINLH", 2, unsign=True,
676 flavor="release").emit(OP_DICT['MIN'])
677 AtomicArithmeticSingleOp("lduminah", "LDUMINAH", 2, unsign=True,
678 flavor="acquire").emit(OP_DICT['MIN'])
679 AtomicArithmeticSingleOp("lduminlah", "LDUMINLAH", 2, unsign=True,
680 flavor="acquire_release").emit(OP_DICT['MIN'])
681 AtomicArithmeticSingleOp("ldumin", "LDUMIN", 4, unsign=True,
682 flavor="normal").emit(OP_DICT['MIN'])
683 AtomicArithmeticSingleOp("lduminl", "LDUMINL", 4, unsign=True,
684 flavor="release").emit(OP_DICT['MIN'])
685 AtomicArithmeticSingleOp("ldumina", "LDUMINA", 4, unsign=True,
686 flavor="acquire").emit(OP_DICT['MIN'])
687 AtomicArithmeticSingleOp("lduminla", "LDUMINLA", 4, unsign=True,
688 flavor="acquire_release").emit(OP_DICT['MIN'])
689 AtomicArithmeticSingleOp("ldumin64", "LDUMIN64", 8, unsign=True,
690 flavor="normal").emit(OP_DICT['MIN'])
691 AtomicArithmeticSingleOp("lduminl64", "LDUMINL64", 8, unsign=True,
692 flavor="release").emit(OP_DICT['MIN'])
693 AtomicArithmeticSingleOp("ldumina64", "LDUMINA64", 8, unsign=True,
694 flavor="acquire").emit(OP_DICT['MIN'])
695 AtomicArithmeticSingleOp("lduminla64", "LDUMINLA64", 8, unsign=True,
696 flavor="acquire_release").emit(OP_DICT['MIN'])
697
698 AtomicArithmeticSingleOp("staddb", "STADDB", 1, unsign=True,
699 ret_op=False, flavor="normal").emit(OP_DICT['ADD'])
700 AtomicArithmeticSingleOp("staddlb", "STADDLB", 1, unsign=True,
701 ret_op=False, flavor="release").emit(OP_DICT['ADD'])
702 AtomicArithmeticSingleOp("staddh", "STADDH", 2, unsign=True,
703 ret_op=False, flavor="normal").emit(OP_DICT['ADD'])
704 AtomicArithmeticSingleOp("staddlh", "STADDLH", 2, unsign=True,
705 ret_op=False, flavor="release").emit(OP_DICT['ADD'])
706 AtomicArithmeticSingleOp("stadd", "STADD", 4, unsign=True,
707 ret_op=False, flavor="normal").emit(OP_DICT['ADD'])
708 AtomicArithmeticSingleOp("staddl", "STADDL", 4, unsign=True,
709 ret_op=False, flavor="release").emit(OP_DICT['ADD'])
710 AtomicArithmeticSingleOp("stadd64", "STADD64", 8, unsign=True,
711 ret_op=False, flavor="normal").emit(OP_DICT['ADD'])
712 AtomicArithmeticSingleOp("staddl64", "STADDL64", 8, unsign=True,
713 ret_op=False, flavor="release").emit(OP_DICT['ADD'])
714
715 AtomicArithmeticSingleOp("stclrb", "STCLRB", 1, unsign=True,
716 ret_op=False, flavor="normal").emit(OP_DICT['CLR'])
717 AtomicArithmeticSingleOp("stclrlb", "STCLRLB", 1, unsign=True,
718 ret_op=False, flavor="release").emit(OP_DICT['CLR'])
719 AtomicArithmeticSingleOp("stclrh", "STCLRH", 2, unsign=True,
720 ret_op=False, flavor="normal").emit(OP_DICT['CLR'])
721 AtomicArithmeticSingleOp("stclrlh", "STCLRLH", 2, unsign=True,
722 ret_op=False, flavor="release").emit(OP_DICT['CLR'])
723 AtomicArithmeticSingleOp("stclr", "STCLR", 4, unsign=True,
724 ret_op=False, flavor="normal").emit(OP_DICT['CLR'])
725 AtomicArithmeticSingleOp("stclrl", "STCLRL", 4, unsign=True,
726 ret_op=False, flavor="release").emit(OP_DICT['CLR'])
727 AtomicArithmeticSingleOp("stclr64", "STCLR64", 8, unsign=True,
728 ret_op=False, flavor="normal").emit(OP_DICT['CLR'])
729 AtomicArithmeticSingleOp("stclrl64", "STCLRL64", 8, unsign=True,
730 ret_op=False, flavor="release").emit(OP_DICT['CLR'])
731
732 AtomicArithmeticSingleOp("steorb", "STEORB", 1, unsign=True,
733 ret_op=False, flavor="normal").emit(OP_DICT['EOR'])
734 AtomicArithmeticSingleOp("steorlb", "STEORLB", 1, unsign=True,
735 ret_op=False, flavor="release").emit(OP_DICT['EOR'])
736 AtomicArithmeticSingleOp("steorh", "STEORH", 2, unsign=True,
737 ret_op=False, flavor="normal").emit(OP_DICT['EOR'])
738 AtomicArithmeticSingleOp("steorlh", "STEORLH", 2, unsign=True,
739 ret_op=False, flavor="release").emit(OP_DICT['EOR'])
740 AtomicArithmeticSingleOp("steor", "STEOR", 4, unsign=True,
741 ret_op=False, flavor="normal").emit(OP_DICT['EOR'])
742 AtomicArithmeticSingleOp("steorl", "STEORL", 4, unsign=True,
743 ret_op=False, flavor="release").emit(OP_DICT['EOR'])
744 AtomicArithmeticSingleOp("steor64", "STEOR64", 8, unsign=True,
745 ret_op=False, flavor="normal").emit(OP_DICT['EOR'])
746 AtomicArithmeticSingleOp("steorl64", "STEORL64", 8, unsign=True,
747 ret_op=False, flavor="release").emit(OP_DICT['EOR'])
748
749 AtomicArithmeticSingleOp("stsetb", "STSETB", 1, unsign=True,
750 ret_op=False, flavor="normal").emit(OP_DICT['SET'])
751 AtomicArithmeticSingleOp("stsetlb", "STSETLB", 1, unsign=True,
752 ret_op=False, flavor="release").emit(OP_DICT['SET'])
753 AtomicArithmeticSingleOp("stsetab", "STSETAB", 1, unsign=True,
754 ret_op=False, flavor="acquire").emit(OP_DICT['SET'])
755 AtomicArithmeticSingleOp("stsetlab", "STSETLAB", 1, unsign=True,
756 ret_op=False, flavor="acquire_release").emit(OP_DICT['SET'])
757 AtomicArithmeticSingleOp("stseth", "STSETH", 2, unsign=True,
758 ret_op=False, flavor="normal").emit(OP_DICT['SET'])
759 AtomicArithmeticSingleOp("stsetlh", "STSETLH", 2, unsign=True,
760 ret_op=False, flavor="release").emit(OP_DICT['SET'])
761 AtomicArithmeticSingleOp("stset", "STSET", 4, unsign=True,
762 ret_op=False, flavor="normal").emit(OP_DICT['SET'])
763 AtomicArithmeticSingleOp("stsetl", "STSETL", 4, unsign=True,
764 ret_op=False, flavor="release").emit(OP_DICT['SET'])
765 AtomicArithmeticSingleOp("stset64", "STSET64", 8, unsign=True,
766 ret_op=False, flavor="normal").emit(OP_DICT['SET'])
767 AtomicArithmeticSingleOp("stsetl64", "STSETL64", 8, unsign=True,
768 ret_op=False, flavor="release").emit(OP_DICT['SET'])
769
770 AtomicArithmeticSingleOp("stsmaxb", "STSMAXB", 1, unsign=False,
771 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
772 AtomicArithmeticSingleOp("stsmaxlb", "STSMAXLB", 1, unsign=False,
773 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
774 AtomicArithmeticSingleOp("stsmaxh", "STSMAXH", 2, unsign=False,
775 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
776 AtomicArithmeticSingleOp("stsmaxlh", "STSMAXLH", 2, unsign=False,
777 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
778 AtomicArithmeticSingleOp("stsmax", "STSMAX", 4, unsign=False,
779 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
780 AtomicArithmeticSingleOp("stsmaxl", "STSMAXL", 4, unsign=False,
781 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
782 AtomicArithmeticSingleOp("stsmax64", "STSMAX64", 8, unsign=False,
783 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
784 AtomicArithmeticSingleOp("stsmaxl64", "STSMAXL64", 8, unsign=False,
785 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
786
787 AtomicArithmeticSingleOp("stsminb", "STSMINB", 1, unsign=False,
788 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
789 AtomicArithmeticSingleOp("stsminlb", "STSMINLB", 1, unsign=False,
790 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
791 AtomicArithmeticSingleOp("stsminh", "STSMINH", 2, unsign=False,
792 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
793 AtomicArithmeticSingleOp("stsminlh", "STSMINLH", 2, unsign=False,
794 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
795 AtomicArithmeticSingleOp("stsmin", "STSMIN", 4, unsign=False,
796 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
797 AtomicArithmeticSingleOp("stsminl", "STSMINL", 4, unsign=False,
798 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
799 AtomicArithmeticSingleOp("stsmin64", "STSMIN64", 8, unsign=False,
800 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
801 AtomicArithmeticSingleOp("stsminl64", "STSMINL64", 8, unsign=False,
802 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
803
804 AtomicArithmeticSingleOp("stumaxb", "STUMAXB", 1, unsign=True,
805 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
806 AtomicArithmeticSingleOp("stumaxlb", "STUMAXLB", 1, unsign=True,
807 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
808 AtomicArithmeticSingleOp("stumaxh", "STUMAXH", 2, unsign=True,
809 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
810 AtomicArithmeticSingleOp("stumaxlh", "STUMAXLH", 2, unsign=True,
811 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
812 AtomicArithmeticSingleOp("stumax", "STUMAX", 4, unsign=True,
813 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
814 AtomicArithmeticSingleOp("stumaxl", "STUMAXL", 4, unsign=True,
815 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
816 AtomicArithmeticSingleOp("stumax64", "STUMAX64", 8, unsign=True,
817 ret_op=False, flavor="normal").emit(OP_DICT['MAX'])
818 AtomicArithmeticSingleOp("stumaxl64", "STUMAXL64", 8, unsign=True,
819 ret_op=False, flavor="release").emit(OP_DICT['MAX'])
820
821 AtomicArithmeticSingleOp("stuminb", "STUMINB", 1, unsign=True,
822 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
823 AtomicArithmeticSingleOp("stuminlb", "STUMINLB", 1, unsign=True,
824 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
825 AtomicArithmeticSingleOp("stuminh", "STUMINH", 2, unsign=True,
826 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
827 AtomicArithmeticSingleOp("stuminlh", "STUMINLH", 2, unsign=True,
828 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
829 AtomicArithmeticSingleOp("stumin", "STUMIN", 4, unsign=True,
830 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
831 AtomicArithmeticSingleOp("stuminl", "STUMINL", 4, unsign=True,
832 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
833 AtomicArithmeticSingleOp("stumin64", "STUMIN64", 8, unsign=True,
834 ret_op=False, flavor="normal").emit(OP_DICT['MIN'])
835 AtomicArithmeticSingleOp("stuminl64", "STUMINL64", 8, unsign=True,
836 ret_op=False, flavor="release").emit(OP_DICT['MIN'])
837
838 AtomicArithmeticSingleOp("swpb", "SWPB", 1, unsign=True,
839 ret_op=False, flavor="normal").emit(OP_DICT['SWP'])
840 AtomicArithmeticSingleOp("swplb", "SWPLB", 1, unsign=True,
841 ret_op=False, flavor="release").emit(OP_DICT['SWP'])
842 AtomicArithmeticSingleOp("swpab", "SWPAB", 1, unsign=True,
843 ret_op=False, flavor="acquire").emit(OP_DICT['SWP'])
844 AtomicArithmeticSingleOp("swplab", "SWPLAB", 1, unsign=True,
845 ret_op=False, flavor="acquire_release").emit(OP_DICT['SWP'])
846 AtomicArithmeticSingleOp("swph", "SWPH", 2, unsign=True,
847 ret_op=False, flavor="normal").emit(OP_DICT['SWP'])
848 AtomicArithmeticSingleOp("swplh", "SWPLH", 2, unsign=True,
849 ret_op=False, flavor="release").emit(OP_DICT['SWP'])
850 AtomicArithmeticSingleOp("swpah", "SWPAH", 2, unsign=True,
851 ret_op=False, flavor="acquire").emit(OP_DICT['SWP'])
852 AtomicArithmeticSingleOp("swplah", "SWPLAH", 2, unsign=True,
853 ret_op=False, flavor="acquire_release").emit(OP_DICT['SWP'])
854 AtomicArithmeticSingleOp("swp", "SWP", 4, unsign=True,
855 ret_op=False, flavor="normal").emit(OP_DICT['SWP'])
856 AtomicArithmeticSingleOp("swpl", "SWPL", 4, unsign=True,
857 ret_op=False, flavor="release").emit(OP_DICT['SWP'])
858 AtomicArithmeticSingleOp("swpa", "SWPA", 4, unsign=True,
859 ret_op=False, flavor="acquire").emit(OP_DICT['SWP'])
860 AtomicArithmeticSingleOp("swpla", "SWPLA", 4, unsign=True,
861 ret_op=False, flavor="acquire_release").emit(OP_DICT['SWP'])
862 AtomicArithmeticSingleOp("swp64", "SWP64", 8, unsign=True,
863 ret_op=False, flavor="normal").emit(OP_DICT['SWP'])
864 AtomicArithmeticSingleOp("swpl64", "SWPL64", 8, unsign=True,
865 ret_op=False, flavor="release").emit(OP_DICT['SWP'])
866 AtomicArithmeticSingleOp("swpa64", "SWPA64", 8, unsign=True,
867 ret_op=False, flavor="acquire").emit(OP_DICT['SWP'])
868 AtomicArithmeticSingleOp("swpla64", "SWPLA64", 8, unsign=True,
869 ret_op=False, flavor="acquire_release").emit(OP_DICT['SWP'])
870 }};