e931478590b183c838e93cf86059c0aede3d71e4
[gem5.git] / src / arch / arm / isa / insts / m5ops.isa
1 //
2 // Copyright (c) 2010, 2012-2013 ARM Limited
3 // All rights reserved
4 //
5 // The license below extends only to copyright in the software and shall
6 // not be construed as granting a license to any other intellectual
7 // property including but not limited to intellectual property relating
8 // to a hardware implementation of the functionality of the software
9 // licensed hereunder. You may use the software subject to the license
10 // terms below provided that you ensure that this notice is replicated
11 // unmodified and in its entirety in all distributions of the software,
12 // modified or unmodified, in source code or in binary form.
13 //
14 // Redistribution and use in source and binary forms, with or without
15 // modification, are permitted provided that the following conditions are
16 // met: redistributions of source code must retain the above copyright
17 // notice, this list of conditions and the following disclaimer;
18 // redistributions in binary form must reproduce the above copyright
19 // notice, this list of conditions and the following disclaimer in the
20 // documentation and/or other materials provided with the distribution;
21 // neither the name of the copyright holders nor the names of its
22 // contributors may be used to endorse or promote products derived from
23 // this software without specific prior written permission.
24 //
25 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 //
37 // Authors: Gene Wu
38
39
40 let {{
41 header_output = '''
42 uint64_t join32to64(uint32_t r1, uint32_t r0);
43 '''
44 decoder_output = '''
45 uint64_t join32to64(uint32_t r1, uint32_t r0)
46 {
47 uint64_t r = r1;
48 r <<= 32;
49 r |= r0;
50 return r;
51 }
52 '''
53 exec_output = '''
54 uint64_t join32to64(uint32_t r1, uint32_t r0);
55 '''
56
57
58 armCode = '''
59 PseudoInst::arm(xc->tcBase());
60 '''
61
62 armIop = InstObjParams("arm", "Arm", "PredOp",
63 { "code": armCode,
64 "predicate_test": predicateTest },
65 ["IsNonSpeculative"])
66 header_output += BasicDeclare.subst(armIop)
67 decoder_output += BasicConstructor.subst(armIop)
68 exec_output += PredOpExecute.subst(armIop)
69
70 quiesceCode = '''
71 PseudoInst::quiesce(xc->tcBase());
72 '''
73
74 quiesceIop = InstObjParams("quiesce", "Quiesce", "PredOp",
75 { "code": quiesceCode,
76 "predicate_test": predicateTest },
77 ["IsNonSpeculative", "IsQuiesce"])
78 header_output += BasicDeclare.subst(quiesceIop)
79 decoder_output += BasicConstructor.subst(quiesceIop)
80 exec_output += QuiescePredOpExecute.subst(quiesceIop)
81
82 quiesceNsCode = '''
83 PseudoInst::quiesceNs(xc->tcBase(), join32to64(R1, R0));
84 '''
85
86 quiesceNsCode64 = '''
87 PseudoInst::quiesceNs(xc->tcBase(), X0);
88 '''
89
90 quiesceNsIop = InstObjParams("quiesceNs", "QuiesceNs", "PredOp",
91 { "code": quiesceNsCode,
92 "predicate_test": predicateTest },
93 ["IsNonSpeculative", "IsQuiesce"])
94 header_output += BasicDeclare.subst(quiesceNsIop)
95 decoder_output += BasicConstructor.subst(quiesceNsIop)
96 exec_output += QuiescePredOpExecute.subst(quiesceNsIop)
97
98 quiesceNsIop = InstObjParams("quiesceNs", "QuiesceNs64", "PredOp",
99 { "code": quiesceNsCode64,
100 "predicate_test": predicateTest },
101 ["IsNonSpeculative", "IsQuiesce"])
102 header_output += BasicDeclare.subst(quiesceNsIop)
103 decoder_output += BasicConstructor.subst(quiesceNsIop)
104 exec_output += QuiescePredOpExecute.subst(quiesceNsIop)
105
106 quiesceCyclesCode = '''
107 PseudoInst::quiesceCycles(xc->tcBase(), join32to64(R1, R0));
108 '''
109
110 quiesceCyclesCode64 = '''
111 PseudoInst::quiesceCycles(xc->tcBase(), X0);
112 '''
113
114 quiesceCyclesIop = InstObjParams("quiesceCycles", "QuiesceCycles", "PredOp",
115 { "code": quiesceCyclesCode,
116 "predicate_test": predicateTest },
117 ["IsNonSpeculative", "IsQuiesce", "IsUnverifiable"])
118 header_output += BasicDeclare.subst(quiesceCyclesIop)
119 decoder_output += BasicConstructor.subst(quiesceCyclesIop)
120 exec_output += QuiescePredOpExecute.subst(quiesceCyclesIop)
121
122 quiesceCyclesIop = InstObjParams("quiesceCycles", "QuiesceCycles64", "PredOp",
123 { "code": quiesceCyclesCode64,
124 "predicate_test": predicateTest },
125 ["IsNonSpeculative", "IsQuiesce", "IsUnverifiable"])
126 header_output += BasicDeclare.subst(quiesceCyclesIop)
127 decoder_output += BasicConstructor.subst(quiesceCyclesIop)
128 exec_output += QuiescePredOpExecute.subst(quiesceCyclesIop)
129
130 quiesceTimeCode = '''
131 uint64_t qt_val = PseudoInst::quiesceTime(xc->tcBase());
132 R0 = bits(qt_val, 31, 0);
133 R1 = bits(qt_val, 63, 32);
134 '''
135
136 quiesceTimeCode64 = '''
137 X0 = PseudoInst::quiesceTime(xc->tcBase());
138 '''
139 quiesceTimeIop = InstObjParams("quiesceTime", "QuiesceTime", "PredOp",
140 { "code": quiesceTimeCode,
141 "predicate_test": predicateTest },
142 ["IsNonSpeculative", "IsUnverifiable"])
143 header_output += BasicDeclare.subst(quiesceTimeIop)
144 decoder_output += BasicConstructor.subst(quiesceTimeIop)
145 exec_output += PredOpExecute.subst(quiesceTimeIop)
146
147 quiesceTimeIop = InstObjParams("quiesceTime", "QuiesceTime64", "PredOp",
148 { "code": quiesceTimeCode64,
149 "predicate_test": predicateTest },
150 ["IsNonSpeculative", "IsUnverifiable"])
151 header_output += BasicDeclare.subst(quiesceTimeIop)
152 decoder_output += BasicConstructor.subst(quiesceTimeIop)
153 exec_output += PredOpExecute.subst(quiesceTimeIop)
154
155 rpnsCode = '''
156 uint64_t rpns_val = PseudoInst::rpns(xc->tcBase());
157 R0 = bits(rpns_val, 31, 0);
158 R1 = bits(rpns_val, 63, 32);
159 '''
160
161 rpnsCode64 = '''
162 X0 = PseudoInst::rpns(xc->tcBase());
163 '''
164 rpnsIop = InstObjParams("rpns", "Rpns", "PredOp",
165 { "code": rpnsCode,
166 "predicate_test": predicateTest },
167 ["IsNonSpeculative", "IsUnverifiable"])
168 header_output += BasicDeclare.subst(rpnsIop)
169 decoder_output += BasicConstructor.subst(rpnsIop)
170 exec_output += PredOpExecute.subst(rpnsIop)
171
172 rpnsIop = InstObjParams("rpns", "Rpns64", "PredOp",
173 { "code": rpnsCode64,
174 "predicate_test": predicateTest },
175 ["IsNonSpeculative", "IsUnverifiable"])
176 header_output += BasicDeclare.subst(rpnsIop)
177 decoder_output += BasicConstructor.subst(rpnsIop)
178 exec_output += PredOpExecute.subst(rpnsIop)
179
180 wakeCpuCode = '''
181 PseudoInst::wakeCPU(xc->tcBase(), join32to64(R1,R0));
182 '''
183
184 wakeCpuCode64 = '''
185 PseudoInst::wakeCPU(xc->tcBase(), X0);
186 '''
187
188 wakeCPUIop = InstObjParams("wakeCPU", "WakeCPU", "PredOp",
189 { "code": wakeCpuCode,
190 "predicate_test": predicateTest },
191 ["IsNonSpeculative", "IsUnverifiable"])
192 header_output += BasicDeclare.subst(wakeCPUIop)
193 decoder_output += BasicConstructor.subst(wakeCPUIop)
194 exec_output += PredOpExecute.subst(wakeCPUIop)
195
196 wakeCPUIop = InstObjParams("wakeCPU", "WakeCPU64", "PredOp",
197 { "code": wakeCpuCode64,
198 "predicate_test": predicateTest },
199 ["IsNonSpeculative", "IsUnverifiable"])
200 header_output += BasicDeclare.subst(wakeCPUIop)
201 decoder_output += BasicConstructor.subst(wakeCPUIop)
202 exec_output += PredOpExecute.subst(wakeCPUIop)
203
204 deprecated_ivlbIop = InstObjParams("deprecated_ivlb", "Deprecated_ivlb", "PredOp",
205 { "code": '''warn_once("Obsolete M5 ivlb instruction encountered.\\n");''',
206 "predicate_test": predicateTest })
207 header_output += BasicDeclare.subst(deprecated_ivlbIop)
208 decoder_output += BasicConstructor.subst(deprecated_ivlbIop)
209 exec_output += PredOpExecute.subst(deprecated_ivlbIop)
210
211 deprecated_ivleIop = InstObjParams("deprecated_ivle", "Deprecated_ivle", "PredOp",
212 { "code": '''warn_once("Obsolete M5 ivle instruction encountered.\\n");''',
213 "predicate_test": predicateTest })
214 header_output += BasicDeclare.subst(deprecated_ivleIop)
215 decoder_output += BasicConstructor.subst(deprecated_ivleIop)
216 exec_output += PredOpExecute.subst(deprecated_ivleIop)
217
218 deprecated_exit_code = '''
219 warn_once("Obsolete M5 exit instruction encountered.\\n");
220 PseudoInst::m5exit(xc->tcBase(), 0);
221 '''
222
223 deprecated_exitIop = InstObjParams("deprecated_exit", "Deprecated_exit", "PredOp",
224 { "code": deprecated_exit_code,
225 "predicate_test": predicateTest },
226 ["No_OpClass", "IsNonSpeculative"])
227 header_output += BasicDeclare.subst(deprecated_exitIop)
228 decoder_output += BasicConstructor.subst(deprecated_exitIop)
229 exec_output += PredOpExecute.subst(deprecated_exitIop)
230
231 m5exit_code = '''
232 PseudoInst::m5exit(xc->tcBase(), join32to64(R1, R0));
233 '''
234
235 m5exit_code64 = '''
236 PseudoInst::m5exit(xc->tcBase(), X0);
237 '''
238
239 m5exitIop = InstObjParams("m5exit", "M5exit", "PredOp",
240 { "code": m5exit_code,
241 "predicate_test": predicateTest },
242 ["No_OpClass", "IsNonSpeculative"])
243 header_output += BasicDeclare.subst(m5exitIop)
244 decoder_output += BasicConstructor.subst(m5exitIop)
245 exec_output += PredOpExecute.subst(m5exitIop)
246
247 m5fail_code = '''
248 PseudoInst::m5fail(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2));
249 '''
250
251 m5fail_code64 = '''
252 PseudoInst::m5fail(xc->tcBase(), X0, X1);
253 '''
254
255 m5failIop = InstObjParams("m5fail", "M5fail", "PredOp",
256 { "code": m5fail_code,
257 "predicate_test": predicateTest },
258 ["No_OpClass", "IsNonSpeculative"])
259 header_output += BasicDeclare.subst(m5failIop)
260 decoder_output += BasicConstructor.subst(m5failIop)
261 exec_output += PredOpExecute.subst(m5failIop)
262
263 m5failIop = InstObjParams("m5fail", "M5fail64", "PredOp",
264 { "code": m5fail_code64,
265 "predicate_test": predicateTest },
266 ["No_OpClass", "IsNonSpeculative"])
267 header_output += BasicDeclare.subst(m5failIop)
268 decoder_output += BasicConstructor.subst(m5failIop)
269 exec_output += PredOpExecute.subst(m5failIop)
270
271
272 m5exitIop = InstObjParams("m5exit", "M5exit64", "PredOp",
273 { "code": m5exit_code64,
274 "predicate_test": predicateTest },
275 ["No_OpClass", "IsNonSpeculative"])
276 header_output += BasicDeclare.subst(m5exitIop)
277 decoder_output += BasicConstructor.subst(m5exitIop)
278 exec_output += PredOpExecute.subst(m5exitIop)
279
280 loadsymbolCode = '''
281 PseudoInst::loadsymbol(xc->tcBase());
282 '''
283
284 loadsymbolIop = InstObjParams("loadsymbol", "Loadsymbol", "PredOp",
285 { "code": loadsymbolCode,
286 "predicate_test": predicateTest },
287 ["No_OpClass", "IsNonSpeculative"])
288 header_output += BasicDeclare.subst(loadsymbolIop)
289 decoder_output += BasicConstructor.subst(loadsymbolIop)
290 exec_output += PredOpExecute.subst(loadsymbolIop)
291
292 initparamCode = '''
293 uint64_t ip_val = PseudoInst::initParam(xc->tcBase(), join32to64(R1, R0),
294 join32to64(R3, R2));
295 R0 = bits(ip_val, 31, 0);
296 R1 = bits(ip_val, 63, 32);
297 '''
298
299 initparamCode64 = '''
300 X0 = PseudoInst::initParam(xc->tcBase(), X0, X1);
301 '''
302
303 initparamIop = InstObjParams("initparam", "Initparam", "PredOp",
304 { "code": initparamCode,
305 "predicate_test": predicateTest },
306 ["IsNonSpeculative"])
307 header_output += BasicDeclare.subst(initparamIop)
308 decoder_output += BasicConstructor.subst(initparamIop)
309 exec_output += PredOpExecute.subst(initparamIop)
310
311 initparamIop = InstObjParams("initparam", "Initparam64", "PredOp",
312 { "code": initparamCode64,
313 "predicate_test": predicateTest },
314 ["IsNonSpeculative"])
315 header_output += BasicDeclare.subst(initparamIop)
316 decoder_output += BasicConstructor.subst(initparamIop)
317 exec_output += PredOpExecute.subst(initparamIop)
318
319 resetstats_code = '''
320 PseudoInst::resetstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2));
321 '''
322
323 resetstats_code64 = '''
324 PseudoInst::resetstats(xc->tcBase(), X0, X1);
325 '''
326 resetstatsIop = InstObjParams("resetstats", "Resetstats", "PredOp",
327 { "code": resetstats_code,
328 "predicate_test": predicateTest },
329 ["IsNonSpeculative"])
330 header_output += BasicDeclare.subst(resetstatsIop)
331 decoder_output += BasicConstructor.subst(resetstatsIop)
332 exec_output += PredOpExecute.subst(resetstatsIop)
333
334 resetstatsIop = InstObjParams("resetstats", "Resetstats64", "PredOp",
335 { "code": resetstats_code64,
336 "predicate_test": predicateTest },
337 ["IsNonSpeculative"])
338 header_output += BasicDeclare.subst(resetstatsIop)
339 decoder_output += BasicConstructor.subst(resetstatsIop)
340 exec_output += PredOpExecute.subst(resetstatsIop)
341
342 dumpstats_code = '''
343 PseudoInst::dumpstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2));
344 '''
345
346 dumpstats_code64 = '''
347 PseudoInst::dumpstats(xc->tcBase(), X0, X1);
348 '''
349
350 dumpstatsIop = InstObjParams("dumpstats", "Dumpstats", "PredOp",
351 { "code": dumpstats_code,
352 "predicate_test": predicateTest },
353 ["IsNonSpeculative"])
354 header_output += BasicDeclare.subst(dumpstatsIop)
355 decoder_output += BasicConstructor.subst(dumpstatsIop)
356 exec_output += PredOpExecute.subst(dumpstatsIop)
357
358 dumpstatsIop = InstObjParams("dumpstats", "Dumpstats64", "PredOp",
359 { "code": dumpstats_code64,
360 "predicate_test": predicateTest },
361 ["IsNonSpeculative"])
362 header_output += BasicDeclare.subst(dumpstatsIop)
363 decoder_output += BasicConstructor.subst(dumpstatsIop)
364 exec_output += PredOpExecute.subst(dumpstatsIop)
365
366 dumpresetstats_code = '''
367 PseudoInst::dumpresetstats(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2));
368 '''
369
370 dumpresetstats_code64 = '''
371 PseudoInst::dumpresetstats(xc->tcBase(), X0, X1);
372 '''
373
374 dumpresetstatsIop = InstObjParams("dumpresetstats", "Dumpresetstats", "PredOp",
375 { "code": dumpresetstats_code,
376 "predicate_test": predicateTest },
377 ["IsNonSpeculative"])
378 header_output += BasicDeclare.subst(dumpresetstatsIop)
379 decoder_output += BasicConstructor.subst(dumpresetstatsIop)
380 exec_output += PredOpExecute.subst(dumpresetstatsIop)
381
382 dumpresetstatsIop = InstObjParams("dumpresetstats", "Dumpresetstats64", "PredOp",
383 { "code": dumpresetstats_code64,
384 "predicate_test": predicateTest },
385 ["IsNonSpeculative"])
386 header_output += BasicDeclare.subst(dumpresetstatsIop)
387 decoder_output += BasicConstructor.subst(dumpresetstatsIop)
388 exec_output += PredOpExecute.subst(dumpresetstatsIop)
389
390 m5checkpoint_code = '''
391 PseudoInst::m5checkpoint(xc->tcBase(), join32to64(R1, R0), join32to64(R3, R2));
392 '''
393
394 m5checkpoint_code64 = '''
395 PseudoInst::m5checkpoint(xc->tcBase(), X0, X1);
396 '''
397
398 m5checkpointIop = InstObjParams("m5checkpoint", "M5checkpoint", "PredOp",
399 { "code": m5checkpoint_code,
400 "predicate_test": predicateTest },
401 ["IsNonSpeculative", "IsUnverifiable"])
402 header_output += BasicDeclare.subst(m5checkpointIop)
403 decoder_output += BasicConstructor.subst(m5checkpointIop)
404 exec_output += PredOpExecute.subst(m5checkpointIop)
405
406 m5checkpointIop = InstObjParams("m5checkpoint", "M5checkpoint64", "PredOp",
407 { "code": m5checkpoint_code64,
408 "predicate_test": predicateTest },
409 ["IsNonSpeculative", "IsUnverifiable"])
410 header_output += BasicDeclare.subst(m5checkpointIop)
411 decoder_output += BasicConstructor.subst(m5checkpointIop)
412 exec_output += PredOpExecute.subst(m5checkpointIop)
413
414 m5readfileCode = '''
415 int n = 4;
416 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false);
417 R0 = PseudoInst::readfile(xc->tcBase(), R0, join32to64(R3,R2), offset);
418 '''
419
420 m5readfileCode64 = '''
421 int n = 2;
422 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false);
423 n = 3;
424 X0 = PseudoInst::readfile(xc->tcBase(), X0, X1, offset);
425 '''
426
427 m5readfileIop = InstObjParams("m5readfile", "M5readfile", "PredOp",
428 { "code": m5readfileCode,
429 "predicate_test": predicateTest },
430 ["IsNonSpeculative", "IsUnverifiable"])
431 header_output += BasicDeclare.subst(m5readfileIop)
432 decoder_output += BasicConstructor.subst(m5readfileIop)
433 exec_output += PredOpExecute.subst(m5readfileIop)
434
435 m5readfileIop = InstObjParams("m5readfile", "M5readfile64", "PredOp",
436 { "code": m5readfileCode64,
437 "predicate_test": predicateTest },
438 ["IsNonSpeculative", "IsUnverifiable"])
439 header_output += BasicDeclare.subst(m5readfileIop)
440 decoder_output += BasicConstructor.subst(m5readfileIop)
441 exec_output += PredOpExecute.subst(m5readfileIop)
442
443 m5writefileCode = '''
444 int n = 4;
445 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false);
446 n = 6;
447 Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false);
448 R0 = PseudoInst::writefile(xc->tcBase(), R0, join32to64(R3,R2), offset,
449 filenameAddr);
450 '''
451
452 m5writefileCode64 = '''
453 int n = 2;
454 uint64_t offset = getArgument(xc->tcBase(), n, sizeof(uint64_t), false);
455 n = 3;
456 Addr filenameAddr = getArgument(xc->tcBase(), n, sizeof(Addr), false);
457 X0 = PseudoInst::writefile(xc->tcBase(), X0, X1, offset,
458 filenameAddr);
459 '''
460
461 m5writefileIop = InstObjParams("m5writefile", "M5writefile", "PredOp",
462 { "code": m5writefileCode,
463 "predicate_test": predicateTest },
464 ["IsNonSpeculative"])
465 header_output += BasicDeclare.subst(m5writefileIop)
466 decoder_output += BasicConstructor.subst(m5writefileIop)
467 exec_output += PredOpExecute.subst(m5writefileIop)
468
469 m5writefileIop = InstObjParams("m5writefile", "M5writefile64", "PredOp",
470 { "code": m5writefileCode64,
471 "predicate_test": predicateTest },
472 ["IsNonSpeculative"])
473 header_output += BasicDeclare.subst(m5writefileIop)
474 decoder_output += BasicConstructor.subst(m5writefileIop)
475 exec_output += PredOpExecute.subst(m5writefileIop)
476
477 m5breakIop = InstObjParams("m5break", "M5break", "PredOp",
478 { "code": "PseudoInst::debugbreak(xc->tcBase());",
479 "predicate_test": predicateTest },
480 ["IsNonSpeculative"])
481 header_output += BasicDeclare.subst(m5breakIop)
482 decoder_output += BasicConstructor.subst(m5breakIop)
483 exec_output += PredOpExecute.subst(m5breakIop)
484
485 m5switchcpuIop = InstObjParams("m5switchcpu", "M5switchcpu", "PredOp",
486 { "code": "PseudoInst::switchcpu(xc->tcBase());",
487 "predicate_test": predicateTest },
488 ["IsNonSpeculative"])
489 header_output += BasicDeclare.subst(m5switchcpuIop)
490 decoder_output += BasicConstructor.subst(m5switchcpuIop)
491 exec_output += PredOpExecute.subst(m5switchcpuIop)
492
493 m5addsymbolCode = '''
494 PseudoInst::addsymbol(xc->tcBase(), join32to64(R1, R0), R2);
495 '''
496 m5addsymbolCode64 = '''
497 PseudoInst::addsymbol(xc->tcBase(), X0, X1);
498 '''
499 m5addsymbolIop = InstObjParams("m5addsymbol", "M5addsymbol", "PredOp",
500 { "code": m5addsymbolCode,
501 "predicate_test": predicateTest },
502 ["IsNonSpeculative"])
503 header_output += BasicDeclare.subst(m5addsymbolIop)
504 decoder_output += BasicConstructor.subst(m5addsymbolIop)
505 exec_output += PredOpExecute.subst(m5addsymbolIop)
506
507 m5addsymbolIop = InstObjParams("m5addsymbol", "M5addsymbol64", "PredOp",
508 { "code": m5addsymbolCode64,
509 "predicate_test": predicateTest },
510 ["IsNonSpeculative"])
511 header_output += BasicDeclare.subst(m5addsymbolIop)
512 decoder_output += BasicConstructor.subst(m5addsymbolIop)
513 exec_output += PredOpExecute.subst(m5addsymbolIop)
514
515 m5panicCode = '''panic("M5 panic instruction called at pc=%#x.",
516 xc->pcState().pc());'''
517
518 m5panicIop = InstObjParams("m5panic", "M5panic", "PredOp",
519 { "code": m5panicCode,
520 "predicate_test": predicateTest },
521 ["IsNonSpeculative"])
522 header_output += BasicDeclare.subst(m5panicIop)
523 decoder_output += BasicConstructor.subst(m5panicIop)
524 exec_output += PredOpExecute.subst(m5panicIop)
525
526 m5workbeginCode = '''PseudoInst::workbegin(
527 xc->tcBase(),
528 join32to64(R1, R0),
529 join32to64(R3, R2)
530 );'''
531
532 m5workbeginCode64 = '''PseudoInst::workbegin(
533 xc->tcBase(),
534 X0,
535 X1
536 );'''
537
538 m5workbeginIop = InstObjParams("m5workbegin", "M5workbegin", "PredOp",
539 { "code": m5workbeginCode,
540 "predicate_test": predicateTest },
541 ["IsNonSpeculative"])
542 header_output += BasicDeclare.subst(m5workbeginIop)
543 decoder_output += BasicConstructor.subst(m5workbeginIop)
544 exec_output += PredOpExecute.subst(m5workbeginIop)
545
546 m5workbeginIop = InstObjParams("m5workbegin", "M5workbegin64", "PredOp",
547 { "code": m5workbeginCode64,
548 "predicate_test": predicateTest },
549 ["IsNonSpeculative"])
550 header_output += BasicDeclare.subst(m5workbeginIop)
551 decoder_output += BasicConstructor.subst(m5workbeginIop)
552 exec_output += PredOpExecute.subst(m5workbeginIop)
553
554 m5workendCode = '''PseudoInst::workend(
555 xc->tcBase(),
556 join32to64(R1, R0),
557 join32to64(R3, R2)
558 );'''
559
560 m5workendCode64 = '''PseudoInst::workend(
561 xc->tcBase(),
562 X0,
563 X1
564 );'''
565
566 m5workendIop = InstObjParams("m5workend", "M5workend", "PredOp",
567 { "code": m5workendCode,
568 "predicate_test": predicateTest },
569 ["IsNonSpeculative"])
570 header_output += BasicDeclare.subst(m5workendIop)
571 decoder_output += BasicConstructor.subst(m5workendIop)
572 exec_output += PredOpExecute.subst(m5workendIop)
573
574 m5workendIop = InstObjParams("m5workend", "M5workend64", "PredOp",
575 { "code": m5workendCode64,
576 "predicate_test": predicateTest },
577 ["IsNonSpeculative"])
578 header_output += BasicDeclare.subst(m5workendIop)
579 decoder_output += BasicConstructor.subst(m5workendIop)
580 exec_output += PredOpExecute.subst(m5workendIop)
581 }};