3 // Copyright (c) 2010-2013,2017-2018 ARM Limited
6 // The license below extends only to copyright in the software and shall
7 // not be construed as granting a license to any other intellectual
8 // property including but not limited to intellectual property relating
9 // to a hardware implementation of the functionality of the software
10 // licensed hereunder. You may use the software subject to the license
11 // terms below provided that you ensure that this notice is replicated
12 // unmodified and in its entirety in all distributions of the software,
13 // modified or unmodified, in source code or in binary form.
15 // Redistribution and use in source and binary forms, with or without
16 // modification, are permitted provided that the following conditions are
17 // met: redistributions of source code must retain the above copyright
18 // notice, this list of conditions and the following disclaimer;
19 // redistributions in binary form must reproduce the above copyright
20 // notice, this list of conditions and the following disclaimer in the
21 // documentation and/or other materials provided with the distribution;
22 // neither the name of the copyright holders nor the names of its
23 // contributors may be used to endorse or promote products derived from
24 // this software without specific prior written permission.
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 // Authors: Gabe Black
40 def template MrsDeclare {{
41 class %(class_name)s : public %(base_class)s
46 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest);
47 Fault execute(ExecContext *, Trace::InstRecord *) const override;
51 def template MrsConstructor {{
52 %(class_name)s::%(class_name)s(ExtMachInst machInst,
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest)
57 if (!(condCode == COND_AL || condCode == COND_UC)) {
58 for (int x = 0; x < _numDestRegs; x++) {
59 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
65 def template MrsBankedRegDeclare {{
66 class %(class_name)s : public %(base_class)s
74 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
75 uint8_t _sysM, bool _r);
76 Fault execute(ExecContext *, Trace::InstRecord *) const override;
80 def template MrsBankedRegConstructor {{
81 %(class_name)s::%(class_name)s(ExtMachInst machInst,
85 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest),
86 byteMask(_sysM), r(_r)
89 if (!(condCode == COND_AL || condCode == COND_UC)) {
90 for (int x = 0; x < _numDestRegs; x++) {
91 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
97 def template MsrBankedRegDeclare {{
98 class %(class_name)s : public %(base_class)s
105 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1,
106 uint8_t _sysM, bool _r);
107 Fault execute(ExecContext *, Trace::InstRecord *) const override;
111 def template MsrBankedRegConstructor {{
112 %(class_name)s::%(class_name)s(ExtMachInst machInst,
116 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, _sysM),
120 if (!(condCode == COND_AL || condCode == COND_UC)) {
121 for (int x = 0; x < _numDestRegs; x++) {
122 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
128 def template MsrRegDeclare {{
129 class %(class_name)s : public %(base_class)s
134 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, uint8_t mask);
135 Fault execute(ExecContext *, Trace::InstRecord *) const override;
139 def template MsrRegConstructor {{
140 %(class_name)s::%(class_name)s(ExtMachInst machInst,
143 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _op1, mask)
146 if (!(condCode == COND_AL || condCode == COND_UC)) {
147 for (int x = 0; x < _numDestRegs; x++) {
148 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
154 def template MsrImmDeclare {{
155 class %(class_name)s : public %(base_class)s
160 %(class_name)s(ExtMachInst machInst, uint32_t imm, uint8_t mask);
161 Fault execute(ExecContext *, Trace::InstRecord *) const override;
165 def template MsrImmConstructor {{
166 %(class_name)s::%(class_name)s(ExtMachInst machInst,
169 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, imm, mask)
172 if (!(condCode == COND_AL || condCode == COND_UC)) {
173 for (int x = 0; x < _numDestRegs; x++) {
174 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
180 def template MrrcOpDeclare {{
181 class %(class_name)s : public %(base_class)s
186 %(class_name)s(ExtMachInst machInst, MiscRegIndex _op1,
187 IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm);
188 Fault execute(ExecContext *, Trace::InstRecord *) const override;
192 def template MrrcOpConstructor {{
193 %(class_name)s::%(class_name)s(ExtMachInst machInst,
198 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, dest,
202 if (!(condCode == COND_AL || condCode == COND_UC)) {
203 for (int x = 0; x < _numDestRegs; x++) {
204 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
210 def template McrrOpDeclare {{
211 class %(class_name)s : public %(base_class)s
216 %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2,
217 MiscRegIndex _dest, uint32_t imm);
218 Fault execute(ExecContext *, Trace::InstRecord *) const override;
222 def template McrrOpConstructor {{
223 %(class_name)s::%(class_name)s(ExtMachInst machInst,
228 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2,
232 if (!(condCode == COND_AL || condCode == COND_UC)) {
233 for (int x = 0; x < _numDestRegs; x++) {
234 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
240 def template ImmOpDeclare {{
241 class %(class_name)s : public %(base_class)s
246 %(class_name)s(ExtMachInst machInst, uint64_t _imm);
247 Fault execute(ExecContext *, Trace::InstRecord *) const override;
251 def template ImmOpConstructor {{
252 %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm)
253 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
256 if (!(condCode == COND_AL || condCode == COND_UC)) {
257 for (int x = 0; x < _numDestRegs; x++) {
258 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
264 def template RegImmOpDeclare {{
265 class %(class_name)s : public %(base_class)s
270 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm);
271 Fault execute(ExecContext *, Trace::InstRecord *) const override;
275 def template RegImmOpConstructor {{
276 %(class_name)s::%(class_name)s(ExtMachInst machInst,
277 IntRegIndex _dest, uint64_t _imm)
278 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm)
281 if (!(condCode == COND_AL || condCode == COND_UC)) {
282 for (int x = 0; x < _numDestRegs; x++) {
283 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
289 def template RegRegOpDeclare {{
290 class %(class_name)s : public %(base_class)s
295 %(class_name)s(ExtMachInst machInst,
296 IntRegIndex _dest, IntRegIndex _op1);
297 Fault execute(ExecContext *, Trace::InstRecord *) const override;
301 def template RegRegOpConstructor {{
302 %(class_name)s::%(class_name)s(ExtMachInst machInst,
303 IntRegIndex _dest, IntRegIndex _op1)
304 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1)
307 if (!(condCode == COND_AL || condCode == COND_UC)) {
308 for (int x = 0; x < _numDestRegs; x++) {
309 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
315 def template RegRegRegImmOpDeclare {{
316 class %(class_name)s : public %(base_class)s
321 %(class_name)s(ExtMachInst machInst,
322 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
324 Fault execute(ExecContext *, Trace::InstRecord *) const override;
328 def template RegRegRegImmOpConstructor {{
329 %(class_name)s::%(class_name)s(ExtMachInst machInst,
334 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
335 _dest, _op1, _op2, _imm)
338 if (!(condCode == COND_AL || condCode == COND_UC)) {
339 for (int x = 0; x < _numDestRegs; x++) {
340 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
346 def template RegRegRegRegOpDeclare {{
347 class %(class_name)s : public %(base_class)s
352 %(class_name)s(ExtMachInst machInst,
353 IntRegIndex _dest, IntRegIndex _op1,
354 IntRegIndex _op2, IntRegIndex _op3);
355 Fault execute(ExecContext *, Trace::InstRecord *) const override;
359 def template RegRegRegRegOpConstructor {{
360 %(class_name)s::%(class_name)s(ExtMachInst machInst,
365 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
366 _dest, _op1, _op2, _op3)
369 if (!(condCode == COND_AL || condCode == COND_UC)) {
370 for (int x = 0; x < _numDestRegs; x++) {
371 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
377 def template RegRegRegOpDeclare {{
378 class %(class_name)s : public %(base_class)s
383 %(class_name)s(ExtMachInst machInst,
384 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2);
385 Fault execute(ExecContext *, Trace::InstRecord *) const override;
389 def template RegRegRegOpConstructor {{
390 %(class_name)s::%(class_name)s(ExtMachInst machInst,
394 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
398 if (!(condCode == COND_AL || condCode == COND_UC)) {
399 for (int x = 0; x < _numDestRegs; x++) {
400 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
406 def template RegRegImmOpDeclare {{
407 class %(class_name)s : public %(base_class)s
412 %(class_name)s(ExtMachInst machInst,
413 IntRegIndex _dest, IntRegIndex _op1,
415 Fault execute(ExecContext *, Trace::InstRecord *) const override;
419 def template RegRegImmOpConstructor {{
420 %(class_name)s::%(class_name)s(ExtMachInst machInst,
424 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
428 if (!(condCode == COND_AL || condCode == COND_UC)) {
429 for (int x = 0; x < _numDestRegs; x++) {
430 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
436 def template MiscRegRegImmOpDeclare {{
437 class %(class_name)s : public %(base_class)s
442 %(class_name)s(ExtMachInst machInst,
443 MiscRegIndex _dest, IntRegIndex _op1,
445 Fault execute(ExecContext *, Trace::InstRecord *) const override;
449 def template MiscRegRegImmOpConstructor {{
450 %(class_name)s::%(class_name)s(ExtMachInst machInst,
454 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
458 if (!(condCode == COND_AL || condCode == COND_UC)) {
459 for (int x = 0; x < _numDestRegs; x++) {
460 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
466 def template RegMiscRegImmOpDeclare {{
467 class %(class_name)s : public %(base_class)s
472 %(class_name)s(ExtMachInst machInst,
473 IntRegIndex _dest, MiscRegIndex _op1,
475 Fault execute(ExecContext *, Trace::InstRecord *) const override;
479 def template RegMiscRegImmOpConstructor {{
480 %(class_name)s::%(class_name)s(ExtMachInst machInst,
484 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
488 if (!(condCode == COND_AL || condCode == COND_UC)) {
489 for (int x = 0; x < _numDestRegs; x++) {
490 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
496 def template RegImmImmOpDeclare {{
497 class %(class_name)s : public %(base_class)s
502 %(class_name)s(ExtMachInst machInst,
503 IntRegIndex _dest, uint64_t _imm1, uint64_t _imm2);
504 Fault execute(ExecContext *, Trace::InstRecord *) const override;
508 def template RegImmImmOpConstructor {{
509 %(class_name)s::%(class_name)s(ExtMachInst machInst,
513 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
517 if (!(condCode == COND_AL || condCode == COND_UC)) {
518 for (int x = 0; x < _numDestRegs; x++) {
519 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
525 def template RegRegImmImmOpDeclare {{
526 class %(class_name)s : public %(base_class)s
531 %(class_name)s(ExtMachInst machInst,
532 IntRegIndex _dest, IntRegIndex _op1,
533 uint64_t _imm1, uint64_t _imm2);
534 Fault execute(ExecContext *, Trace::InstRecord *) const override;
538 def template RegRegImmImmOpConstructor {{
539 %(class_name)s::%(class_name)s(ExtMachInst machInst,
544 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
545 _dest, _op1, _imm1, _imm2)
548 if (!(condCode == COND_AL || condCode == COND_UC)) {
549 for (int x = 0; x < _numDestRegs; x++) {
550 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
556 def template RegImmRegOpDeclare {{
557 class %(class_name)s : public %(base_class)s
562 %(class_name)s(ExtMachInst machInst,
563 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1);
564 Fault execute(ExecContext *, Trace::InstRecord *) const override;
568 def template RegImmRegOpConstructor {{
569 %(class_name)s::%(class_name)s(ExtMachInst machInst,
573 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
577 if (!(condCode == COND_AL || condCode == COND_UC)) {
578 for (int x = 0; x < _numDestRegs; x++) {
579 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
585 def template RegImmRegShiftOpDeclare {{
586 class %(class_name)s : public %(base_class)s
591 %(class_name)s(ExtMachInst machInst,
592 IntRegIndex _dest, uint64_t _imm, IntRegIndex _op1,
593 int32_t _shiftAmt, ArmShiftType _shiftType);
594 Fault execute(ExecContext *, Trace::InstRecord *) const override;
598 def template RegImmRegShiftOpConstructor {{
599 %(class_name)s::%(class_name)s(ExtMachInst machInst,
604 ArmShiftType _shiftType)
605 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
606 _dest, _imm, _op1, _shiftAmt, _shiftType)
609 if (!(condCode == COND_AL || condCode == COND_UC)) {
610 for (int x = 0; x < _numDestRegs; x++) {
611 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
617 def template MiscRegRegImmMemOpDeclare {{
618 class %(class_name)s : public %(base_class)s
623 %(class_name)s(ExtMachInst machInst,
624 MiscRegIndex _dest, IntRegIndex _op1,
626 Fault execute(ExecContext *, Trace::InstRecord *) const override;
627 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override;
628 Fault completeAcc(PacketPtr, ExecContext *,
629 Trace::InstRecord *) const override;
633 def template Mcr15Execute {{
634 Fault %(class_name)s::execute(ExecContext *xc,
635 Trace::InstRecord *traceData) const
638 Fault fault = NoFault;
644 if (%(predicate_test)s) {
645 if (fault == NoFault) {
649 if (fault == NoFault) {
650 Addr op_size = xc->tcBase()->getSystemPtr()->cacheLineSize();
651 EA &= ~(op_size - 1);
652 fault = xc->writeMem(NULL, op_size, EA, memAccessFlags, NULL);
655 xc->setPredicate(false);
662 def template Mcr15InitiateAcc {{
663 Fault %(class_name)s::initiateAcc(ExecContext *xc,
664 Trace::InstRecord *traceData) const
667 Fault fault = NoFault;
673 if (%(predicate_test)s) {
674 if (fault == NoFault) {
678 if (fault == NoFault) {
679 Addr op_size = xc->tcBase()->getSystemPtr()->cacheLineSize();
680 EA &= ~(op_size - 1);
681 fault = xc->writeMem(NULL, op_size, EA, memAccessFlags, NULL);
684 xc->setPredicate(false);
691 def template Mcr15CompleteAcc {{
692 Fault %(class_name)s::completeAcc(PacketPtr pkt,
694 Trace::InstRecord *traceData) const