f228356be54824f293c0ee8cec833a6657dbeac3
[gem5.git] / src / arch / arm / isa / templates / vfp64.isa
1 // -*- mode:c++ -*-
2
3 // Copyright (c) 2012, 2014 ARM Limited
4 // All rights reserved
5 //
6 // The license below extends only to copyright in the software and shall
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9 // to a hardware implementation of the functionality of the software
10 // licensed hereunder. You may use the software subject to the license
11 // terms below provided that you ensure that this notice is replicated
12 // unmodified and in its entirety in all distributions of the software,
13 // modified or unmodified, in source code or in binary form.
14 //
15 // Redistribution and use in source and binary forms, with or without
16 // modification, are permitted provided that the following conditions are
17 // met: redistributions of source code must retain the above copyright
18 // notice, this list of conditions and the following disclaimer;
19 // redistributions in binary form must reproduce the above copyright
20 // notice, this list of conditions and the following disclaimer in the
21 // documentation and/or other materials provided with the distribution;
22 // neither the name of the copyright holders nor the names of its
23 // contributors may be used to endorse or promote products derived from
24 // this software without specific prior written permission.
25 //
26 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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36 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 //
38 // Authors: Thomas Grocutt
39
40 def template AA64FpRegRegOpConstructor {{
41 %(class_name)s::%(class_name)s(ExtMachInst machInst,
42 IntRegIndex _dest, IntRegIndex _op1,
43 VfpMicroMode mode)
44 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
45 _dest, _op1, mode)
46 {
47 %(constructor)s;
48 }
49 }};
50
51 def template AA64FpRegImmOpConstructor {{
52 %(class_name)s::%(class_name)s(ExtMachInst machInst,
53 IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
55 _dest, _imm, mode)
56 {
57 %(constructor)s;
58 }
59 }};
60
61 def template AA64FpRegRegImmOpConstructor {{
62 %(class_name)s::%(class_name)s(ExtMachInst machInst,
63 IntRegIndex _dest,
64 IntRegIndex _op1,
65 uint64_t _imm,
66 VfpMicroMode mode)
67 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
68 _dest, _op1, _imm, mode)
69 {
70 %(constructor)s;
71 }
72 }};
73
74 def template AA64FpRegRegRegOpConstructor {{
75 %(class_name)s::%(class_name)s(ExtMachInst machInst,
76 IntRegIndex _dest,
77 IntRegIndex _op1,
78 IntRegIndex _op2,
79 VfpMicroMode mode)
80 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
81 _dest, _op1, _op2, mode)
82 {
83 %(constructor)s;
84 }
85 }};
86
87 def template AA64FpRegRegRegRegOpDeclare {{
88 class %(class_name)s : public %(base_class)s
89 {
90 public:
91 // Constructor
92 %(class_name)s(ExtMachInst machInst,
93 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
94 IntRegIndex _op3, VfpMicroMode mode = VfpNotAMicroop);
95 Fault execute(ExecContext *, Trace::InstRecord *) const override;
96 };
97 }};
98
99 def template AA64FpRegRegRegRegOpConstructor {{
100 %(class_name)s::%(class_name)s(ExtMachInst machInst,
101 IntRegIndex _dest,
102 IntRegIndex _op1,
103 IntRegIndex _op2,
104 IntRegIndex _op3,
105 VfpMicroMode mode)
106 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
107 _dest, _op1, _op2, _op3, mode)
108 {
109 %(constructor)s;
110 }
111 }};