2 * Copyright (c) 2010 ARM Limited
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14 * Copyright (c) 2009 The Regents of The University of Michigan
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43 #ifndef __ARCH_ARM_ISA_HH__
44 #define __ARCH_ARM_ISA_HH__
46 #include "arch/arm/registers.hh"
47 #include "arch/arm/tlb.hh"
48 #include "arch/arm/types.hh"
59 MiscReg miscRegs[NumMiscRegs];
60 const IntRegIndex *intRegMap;
63 updateRegMap(CPSR cpsr)
68 intRegMap = IntRegUsrMap;
71 intRegMap = IntRegFiqMap;
74 intRegMap = IntRegIrqMap;
77 intRegMap = IntRegSvcMap;
80 intRegMap = IntRegMonMap;
83 intRegMap = IntRegAbtMap;
86 intRegMap = IntRegUndMap;
89 panic("Unrecognized mode setting in CPSR.\n");
96 MiscReg readMiscRegNoEffect(int misc_reg);
97 MiscReg readMiscReg(int misc_reg, ThreadContext *tc);
98 void setMiscRegNoEffect(int misc_reg, const MiscReg &val);
99 void setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc);
102 flattenIntIndex(int reg)
105 if (reg < NUM_ARCH_INTREGS) {
106 return intRegMap[reg];
107 } else if (reg < NUM_INTREGS) {
110 int mode = reg / intRegsPerMode;
111 reg = reg % intRegsPerMode;
115 return INTREG_USR(reg);
117 return INTREG_FIQ(reg);
119 return INTREG_IRQ(reg);
121 return INTREG_SVC(reg);
123 return INTREG_MON(reg);
125 return INTREG_ABT(reg);
127 return INTREG_UND(reg);
129 panic("Flattening into an unknown mode.\n");
135 flattenFloatIndex(int reg)
141 flattenMiscIndex(int reg)
143 if (reg == MISCREG_SPSR) {
144 int spsr_idx = NUM_MISCREGS;
145 CPSR cpsr = miscRegs[MISCREG_CPSR];
148 warn("User mode does not have SPSR\n");
149 spsr_idx = MISCREG_SPSR;
152 spsr_idx = MISCREG_SPSR_FIQ;
155 spsr_idx = MISCREG_SPSR_IRQ;
158 spsr_idx = MISCREG_SPSR_SVC;
161 spsr_idx = MISCREG_SPSR_MON;
164 spsr_idx = MISCREG_SPSR_ABT;
167 spsr_idx = MISCREG_SPSR_UND;
170 warn("Trying to access SPSR in an invalid mode: %d\n",
172 spsr_idx = MISCREG_SPSR;
180 void serialize(EventManager *em, std::ostream &os)
182 DPRINTF(Checkpoint, "Serializing Arm Misc Registers\n");
183 SERIALIZE_ARRAY(miscRegs, NumMiscRegs);
185 void unserialize(EventManager *em, Checkpoint *cp,
186 const std::string §ion)
188 DPRINTF(Checkpoint, "Unserializing Arm Misc Registers\n");
189 UNSERIALIZE_ARRAY(miscRegs, NumMiscRegs);
190 CPSR tmp_cpsr = miscRegs[MISCREG_CPSR];
191 updateRegMap(tmp_cpsr);
198 miscRegs[MISCREG_SCTLR_RST] = sctlr;