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31 #ifndef __ARCH_ARM_ISA_HH__
32 #define __ARCH_MRM_ISA_HH__
34 #include "arch/arm/registers.hh"
35 #include "arch/arm/types.hh"
46 MiscReg miscRegs[NumMiscRegs];
51 memset(miscRegs, 0, sizeof(miscRegs));
53 cpsr.mode = MODE_USER;
54 miscRegs[MISCREG_CPSR] = cpsr;
55 //XXX We need to initialize the rest of the state.
59 readMiscRegNoEffect(int misc_reg)
61 assert(misc_reg < NumMiscRegs);
62 return miscRegs[misc_reg];
66 readMiscReg(int misc_reg, ThreadContext *tc)
68 assert(misc_reg < NumMiscRegs);
69 return miscRegs[misc_reg];
73 setMiscRegNoEffect(int misc_reg, const MiscReg &val)
75 assert(misc_reg < NumMiscRegs);
76 miscRegs[misc_reg] = val;
80 setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
82 assert(misc_reg < NumMiscRegs);
83 miscRegs[misc_reg] = val;
87 flattenIntIndex(int reg)
93 flattenFloatIndex(int reg)
98 void serialize(EventManager *em, std::ostream &os)
100 void unserialize(EventManager *em, Checkpoint *cp,
101 const std::string §ion)