src/arch/arm/kvm/gic.cc

   1 /*
   2  * Copyright (c) 2015-2017 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Redistribution and use in source and binary forms, with or without
  15  * modification, are permitted provided that the following conditions are
  16  * met: redistributions of source code must retain the above copyright
  17  * notice, this list of conditions and the following disclaimer;
  18  * redistributions in binary form must reproduce the above copyright
  19  * notice, this list of conditions and the following disclaimer in the
  20  * documentation and/or other materials provided with the distribution;
  21  * neither the name of the copyright holders nor the names of its
  22  * contributors may be used to endorse or promote products derived from
  23  * this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * Authors: Andreas Sandberg
  38  *          Curtis Dunham
  39  */
  40
  41 #include "arch/arm/kvm/gic.hh"
  42
  43 #include <linux/kvm.h>
  44
  45 #include "arch/arm/kvm/base_cpu.hh"
  46 #include "debug/Interrupt.hh"
  47 #include "params/KvmGic.hh"
  48 #include "params/MuxingKvmGic.hh"
  49
  50 KvmKernelGicV2::KvmKernelGicV2(KvmVM &_vm, Addr cpu_addr, Addr dist_addr,
  51                                unsigned it_lines)
  52     : cpuRange(RangeSize(cpu_addr, KVM_VGIC_V2_CPU_SIZE)),
  53       distRange(RangeSize(dist_addr, KVM_VGIC_V2_DIST_SIZE)),
  54       vm(_vm),
  55       kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2))
  56 {
  57     kdev.setAttr<uint64_t>(
  58         KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST, dist_addr);
  59     kdev.setAttr<uint64_t>(
  60         KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU, cpu_addr);
  61
  62     kdev.setAttr<uint32_t>(KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 0, it_lines);
  63 }
  64
  65 KvmKernelGicV2::~KvmKernelGicV2()
  66 {
  67 }
  68
  69 void
  70 KvmKernelGicV2::setSPI(unsigned spi)
  71 {
  72     setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, true);
  73 }
  74
  75 void
  76 KvmKernelGicV2::clearSPI(unsigned spi)
  77 {
  78     setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, false);
  79 }
  80
  81 void
  82 KvmKernelGicV2::setPPI(unsigned vcpu, unsigned ppi)
  83 {
  84     setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, true);
  85 }
  86
  87 void
  88 KvmKernelGicV2::clearPPI(unsigned vcpu, unsigned ppi)
  89 {
  90     setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, false);
  91 }
  92
  93 void
  94 KvmKernelGicV2::setIntState(unsigned type, unsigned vcpu, unsigned irq,
  95                             bool high)
  96 {
  97     assert(type <= KVM_ARM_IRQ_TYPE_MASK);
  98     assert(vcpu <= KVM_ARM_IRQ_VCPU_MASK);
  99     assert(irq <= KVM_ARM_IRQ_NUM_MASK);
 100     const uint32_t line(
 101         (type << KVM_ARM_IRQ_TYPE_SHIFT) |
 102         (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
 103         (irq << KVM_ARM_IRQ_NUM_SHIFT));
 104
 105     vm.setIRQLine(line, high);
 106 }
 107
 108
 109 KvmGic::KvmGic(const KvmGicParams *p)
 110     : BaseGic(p),
 111       system(*p->system),
 112       kernelGic(*system.getKvmVM(),
 113                 p->cpu_addr, p->dist_addr, p->it_lines),
 114       addrRanges{kernelGic.distRange, kernelGic.cpuRange}
 115 {
 116 }
 117
 118 KvmGic::~KvmGic()
 119 {
 120 }
 121
 122 void
 123 KvmGic::serialize(CheckpointOut &cp) const
 124 {
 125     panic("Checkpointing unsupported\n");
 126 }
 127
 128 void
 129 KvmGic::unserialize(CheckpointIn &cp)
 130 {
 131     panic("Checkpointing unsupported\n");
 132 }
 133
 134 Tick
 135 KvmGic::read(PacketPtr pkt)
 136 {
 137     panic("KvmGic: PIO from gem5 is currently unsupported\n");
 138 }
 139
 140 Tick
 141 KvmGic::write(PacketPtr pkt)
 142 {
 143     panic("KvmGic: PIO from gem5 is currently unsupported\n");
 144 }
 145
 146 void
 147 KvmGic::sendInt(uint32_t num)
 148 {
 149     DPRINTF(Interrupt, "Set SPI %d\n", num);
 150     kernelGic.setSPI(num);
 151 }
 152
 153 void
 154 KvmGic::clearInt(uint32_t num)
 155 {
 156     DPRINTF(Interrupt, "Clear SPI %d\n", num);
 157     kernelGic.clearSPI(num);
 158 }
 159
 160 void
 161 KvmGic::sendPPInt(uint32_t num, uint32_t cpu)
 162 {
 163     DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
 164     kernelGic.setPPI(cpu, num);
 165 }
 166
 167 void
 168 KvmGic::clearPPInt(uint32_t num, uint32_t cpu)
 169 {
 170     DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
 171     kernelGic.clearPPI(cpu, num);
 172 }
 173
 174 void
 175 KvmGic::verifyMemoryMode() const
 176 {
 177     if (!(system.isAtomicMode() && system.bypassCaches())) {
 178         fatal("The in-kernel KVM GIC can only be used with KVM CPUs, but the "
 179               "current memory mode does not support KVM.\n");
 180     }
 181 }
 182
 183
 184 KvmGic *
 185 KvmGicParams::create()
 186 {
 187     return new KvmGic(this);
 188 }
 189
 190
 191 MuxingKvmGic::MuxingKvmGic(const MuxingKvmGicParams *p)
 192     : Pl390(p),
 193       system(*p->system),
 194       kernelGic(nullptr),
 195       usingKvm(false)
 196 {
 197     if (auto vm = system.getKvmVM()) {
 198         kernelGic = new KvmKernelGicV2(*vm, p->cpu_addr, p->dist_addr,
 199                                        p->it_lines);
 200     }
 201 }
 202
 203 MuxingKvmGic::~MuxingKvmGic()
 204 {
 205 }
 206
 207 void
 208 MuxingKvmGic::startup()
 209 {
 210     usingKvm = (kernelGic != nullptr) && validKvmEnvironment();
 211 }
 212
 213 void
 214 MuxingKvmGic::drainResume()
 215 {
 216     bool use_kvm = (kernelGic != nullptr) && validKvmEnvironment();
 217     if (use_kvm != usingKvm) {
 218         if (use_kvm) // from simulation to KVM emulation
 219             fromPl390ToKvm();
 220         else // from KVM emulation to simulation
 221             fromKvmToPl390();
 222
 223         usingKvm = use_kvm;
 224     }
 225 }
 226
 227 void
 228 MuxingKvmGic::serialize(CheckpointOut &cp) const
 229 {
 230     if (!usingKvm)
 231         return Pl390::serialize(cp);
 232
 233     panic("Checkpointing unsupported\n");
 234 }
 235
 236 void
 237 MuxingKvmGic::unserialize(CheckpointIn &cp)
 238 {
 239     if (!usingKvm)
 240         return Pl390::unserialize(cp);
 241
 242     panic("Checkpointing unsupported\n");
 243 }
 244
 245 Tick
 246 MuxingKvmGic::read(PacketPtr pkt)
 247 {
 248     if (!usingKvm)
 249         return Pl390::read(pkt);
 250
 251     panic("MuxingKvmGic: PIO from gem5 is currently unsupported\n");
 252 }
 253
 254 Tick
 255 MuxingKvmGic::write(PacketPtr pkt)
 256 {
 257     if (!usingKvm)
 258         return Pl390::write(pkt);
 259
 260     panic("MuxingKvmGic: PIO from gem5 is currently unsupported\n");
 261 }
 262
 263 void
 264 MuxingKvmGic::sendInt(uint32_t num)
 265 {
 266     if (!usingKvm)
 267         return Pl390::sendInt(num);
 268
 269     DPRINTF(Interrupt, "Set SPI %d\n", num);
 270     kernelGic->setSPI(num);
 271 }
 272
 273 void
 274 MuxingKvmGic::clearInt(uint32_t num)
 275 {
 276     if (!usingKvm)
 277         return Pl390::clearInt(num);
 278
 279     DPRINTF(Interrupt, "Clear SPI %d\n", num);
 280     kernelGic->clearSPI(num);
 281 }
 282
 283 void
 284 MuxingKvmGic::sendPPInt(uint32_t num, uint32_t cpu)
 285 {
 286     if (!usingKvm)
 287         return Pl390::sendPPInt(num, cpu);
 288     DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
 289     kernelGic->setPPI(cpu, num);
 290 }
 291
 292 void
 293 MuxingKvmGic::clearPPInt(uint32_t num, uint32_t cpu)
 294 {
 295     if (!usingKvm)
 296         return Pl390::clearPPInt(num, cpu);
 297
 298     DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
 299     kernelGic->clearPPI(cpu, num);
 300 }
 301
 302 bool
 303 MuxingKvmGic::validKvmEnvironment() const
 304 {
 305     if (system.threadContexts.empty())
 306         return false;
 307
 308     for (auto tc : system.threadContexts) {
 309         if (dynamic_cast<BaseArmKvmCPU*>(tc->getCpuPtr()) == nullptr) {
 310             return false;
 311         }
 312     }
 313     return true;
 314 }
 315
 316 void
 317 MuxingKvmGic::fromPl390ToKvm()
 318 {
 319     panic("Gic multiplexing not implemented.\n");
 320 }
 321
 322 void
 323 MuxingKvmGic::fromKvmToPl390()
 324 {
 325     panic("Gic multiplexing not implemented.\n");
 326 }
 327
 328 MuxingKvmGic *
 329 MuxingKvmGicParams::create()
 330 {
 331     return new MuxingKvmGic(this);
 332 }