2 * Copyright (c) 2010-2013 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 #include "arch/arm/isa.hh"
43 #include "arch/arm/miscregs.hh"
44 #include "base/misc.hh"
45 #include "cpu/thread_context.hh"
51 decodeCP14Reg(unsigned crn
, unsigned opc1
, unsigned crm
, unsigned opc2
)
61 return MISCREG_DBGDIDR
;
63 return MISCREG_DBGDSCRint
;
87 return MISCREG_TEEHBR
;
119 // If we get here then it must be a register that we haven't implemented
120 warn("CP14 unimplemented crn[%d], opc1[%d], crm[%d], opc2[%d]",
121 crn
, opc1
, crm
, opc2
);
122 return MISCREG_CP14_UNIMPL
;
127 bitset
<NUM_MISCREG_INFOS
> miscRegInfo
[NUM_MISCREGS
] = {
129 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
131 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
133 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
135 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
137 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
139 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
141 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
143 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
145 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
147 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
149 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
151 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
153 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
155 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
157 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
161 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
163 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
165 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
167 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
169 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
171 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
172 // MISCREG_PRRR_MAIR0
173 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000011001")),
174 // MISCREG_PRRR_MAIR0_NS
175 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000101001")),
176 // MISCREG_PRRR_MAIR0_S
177 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000101001")),
178 // MISCREG_NMRR_MAIR1
179 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000011001")),
180 // MISCREG_NMRR_MAIR1_NS
181 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000101001")),
182 // MISCREG_NMRR_MAIR1_S
183 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000101001")),
184 // MISCREG_PMXEVTYPER_PMCCFILTR
185 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000001001")),
187 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
188 // MISCREG_SEV_MAILBOX
189 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
191 // AArch32 CP14 registers
193 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000001")),
194 // MISCREG_DBGDSCRint
195 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000001")),
197 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
198 // MISCREG_DBGDTRTXint
199 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
200 // MISCREG_DBGDTRRXint
201 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
203 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
205 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
206 // MISCREG_DBGDTRRXext
207 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
208 // MISCREG_DBGDSCRext
209 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000100")),
210 // MISCREG_DBGDTRTXext
211 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
213 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
215 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
217 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
219 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
221 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
223 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
225 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
227 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
229 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
231 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
233 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
235 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
237 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
239 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
241 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
243 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
245 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
247 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
249 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
251 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
253 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
255 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
257 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
259 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
261 bitset
<NUM_MISCREG_INFOS
>(string("10101111111111000000")),
263 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
265 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
267 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
269 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
270 // MISCREG_DBGCLAIMSET
271 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
272 // MISCREG_DBGCLAIMCLR
273 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
274 // MISCREG_DBGAUTHSTATUS
275 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
277 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
279 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
281 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000000")),
283 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
285 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
287 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
289 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
291 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
293 // AArch32 CP15 registers
295 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
297 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
299 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
301 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
303 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
305 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000100")),
307 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
309 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
311 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
313 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
315 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
317 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
319 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
321 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
323 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
325 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
327 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
329 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
331 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
333 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
335 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
337 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
339 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
341 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
343 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
345 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
347 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
349 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
351 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
353 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
355 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
357 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
359 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
361 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
363 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
365 bitset
<NUM_MISCREG_INFOS
>(string("11110011000000000001")),
367 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
369 bitset
<NUM_MISCREG_INFOS
>(string("11110111010000000001")),
371 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
373 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
375 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
377 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
379 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
381 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
383 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000100")),
385 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
387 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
389 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
391 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
393 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
395 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
397 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
399 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
401 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
403 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
405 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
407 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
409 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
411 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
413 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
415 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
417 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
419 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
421 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
423 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
425 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010100")),
427 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100100")),
429 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100100")),
431 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010100")),
433 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100100")),
435 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100100")),
437 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
439 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
441 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
443 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
445 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
447 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
449 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
451 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
453 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
455 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
457 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
459 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
461 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
463 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
465 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
467 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
469 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
471 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
473 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
475 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000001")),
477 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
479 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
481 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
483 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
485 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
487 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
489 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
491 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
492 // MISCREG_ATS12NSOPR
493 bitset
<NUM_MISCREG_INFOS
>(string("10101010000000000001")),
494 // MISCREG_ATS12NSOPW
495 bitset
<NUM_MISCREG_INFOS
>(string("10101010000000000001")),
496 // MISCREG_ATS12NSOUR
497 bitset
<NUM_MISCREG_INFOS
>(string("10101010000000000001")),
498 // MISCREG_ATS12NSOUW
499 bitset
<NUM_MISCREG_INFOS
>(string("10101010000000000001")),
501 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
503 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
505 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000001")),
507 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000001")),
509 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
511 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
513 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000100")),
515 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
517 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
519 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
521 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
522 // MISCREG_TLBIASIDIS
523 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
524 // MISCREG_TLBIMVAAIS
525 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
526 // MISCREG_TLBIMVALIS
527 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000000")),
528 // MISCREG_TLBIMVAALIS
529 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000000")),
531 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
533 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
535 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
537 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
539 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
541 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
543 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
545 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
547 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
549 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
551 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000000")),
553 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000000")),
554 // MISCREG_TLBIIPAS2IS
555 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000000")),
556 // MISCREG_TLBIIPAS2LIS
557 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000000")),
558 // MISCREG_TLBIALLHIS
559 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
560 // MISCREG_TLBIMVAHIS
561 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
562 // MISCREG_TLBIALLNSNHIS
563 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
564 // MISCREG_TLBIMVALHIS
565 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000000")),
567 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000000")),
568 // MISCREG_TLBIIPAS2L
569 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000000")),
571 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
573 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
574 // MISCREG_TLBIALLNSNH
575 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
577 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000000")),
579 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
580 // MISCREG_PMCNTENSET
581 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
582 // MISCREG_PMCNTENCLR
583 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
585 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
587 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
589 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
591 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
593 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
595 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
596 // MISCREG_PMXEVTYPER
597 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
599 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
601 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
603 bitset
<NUM_MISCREG_INFOS
>(string("11111111110101000001")),
604 // MISCREG_PMINTENSET
605 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
606 // MISCREG_PMINTENCLR
607 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
609 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000000")),
611 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
613 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
615 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
617 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
619 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
621 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
623 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
625 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
627 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
629 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
631 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
633 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
635 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
637 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
639 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
641 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
643 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
645 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
647 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
649 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
651 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
653 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
655 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000100")),
657 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000100")),
659 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
661 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
663 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
665 bitset
<NUM_MISCREG_INFOS
>(string("11110011000000000001")),
667 bitset
<NUM_MISCREG_INFOS
>(string("11110011000000000000")),
669 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
671 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
673 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000100")),
674 // MISCREG_CONTEXTIDR
675 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
676 // MISCREG_CONTEXTIDR_NS
677 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
678 // MISCREG_CONTEXTIDR_S
679 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
681 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
682 // MISCREG_TPIDRURW_NS
683 bitset
<NUM_MISCREG_INFOS
>(string("11001100111111100001")),
684 // MISCREG_TPIDRURW_S
685 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
687 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
688 // MISCREG_TPIDRURO_NS
689 bitset
<NUM_MISCREG_INFOS
>(string("11001100110101100001")),
690 // MISCREG_TPIDRURO_S
691 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
693 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
694 // MISCREG_TPIDRPRW_NS
695 bitset
<NUM_MISCREG_INFOS
>(string("11001100110000100001")),
696 // MISCREG_TPIDRPRW_S
697 bitset
<NUM_MISCREG_INFOS
>(string("00110011000000100001")),
699 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
701 bitset
<NUM_MISCREG_INFOS
>(string("11110101010101000011")),
703 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
705 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
706 // MISCREG_CNTP_TVAL_NS
707 bitset
<NUM_MISCREG_INFOS
>(string("11001100111111100001")),
708 // MISCREG_CNTP_TVAL_S
709 bitset
<NUM_MISCREG_INFOS
>(string("00110011001111100000")),
711 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
712 // MISCREG_CNTP_CTL_NS
713 bitset
<NUM_MISCREG_INFOS
>(string("11001100111111100001")),
714 // MISCREG_CNTP_CTL_S
715 bitset
<NUM_MISCREG_INFOS
>(string("00110011001111100000")),
717 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
719 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
721 bitset
<NUM_MISCREG_INFOS
>(string("01001000000000000000")),
722 // MISCREG_CNTHP_TVAL
723 bitset
<NUM_MISCREG_INFOS
>(string("01001000000000000000")),
725 bitset
<NUM_MISCREG_INFOS
>(string("01001000000000000000")),
727 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
729 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
731 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
733 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
735 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
737 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
739 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
741 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
743 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
745 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000000")),
747 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
749 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000000")),
751 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
753 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
755 bitset
<NUM_MISCREG_INFOS
>(string("01010101010101000001")),
757 bitset
<NUM_MISCREG_INFOS
>(string("01010101010101000011")),
759 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000010001")),
760 // MISCREG_CNTP_CVAL_NS
761 bitset
<NUM_MISCREG_INFOS
>(string("11001100111111100001")),
762 // MISCREG_CNTP_CVAL_S
763 bitset
<NUM_MISCREG_INFOS
>(string("00110011001111100000")),
765 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
767 bitset
<NUM_MISCREG_INFOS
>(string("11001100000000000001")),
768 // MISCREG_CNTHP_CVAL
769 bitset
<NUM_MISCREG_INFOS
>(string("01001000000000000000")),
771 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000000")),
773 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000100")),
775 // AArch64 registers (Op0=2)
776 // MISCREG_MDCCINT_EL1
777 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
778 // MISCREG_OSDTRRX_EL1
779 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
781 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
782 // MISCREG_OSDTRTX_EL1
783 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
784 // MISCREG_OSECCR_EL1
785 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
786 // MISCREG_DBGBVR0_EL1
787 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
788 // MISCREG_DBGBVR1_EL1
789 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
790 // MISCREG_DBGBVR2_EL1
791 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
792 // MISCREG_DBGBVR3_EL1
793 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
794 // MISCREG_DBGBVR4_EL1
795 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
796 // MISCREG_DBGBVR5_EL1
797 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
798 // MISCREG_DBGBCR0_EL1
799 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
800 // MISCREG_DBGBCR1_EL1
801 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
802 // MISCREG_DBGBCR2_EL1
803 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
804 // MISCREG_DBGBCR3_EL1
805 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
806 // MISCREG_DBGBCR4_EL1
807 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
808 // MISCREG_DBGBCR5_EL1
809 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
810 // MISCREG_DBGWVR0_EL1
811 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
812 // MISCREG_DBGWVR1_EL1
813 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
814 // MISCREG_DBGWVR2_EL1
815 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
816 // MISCREG_DBGWVR3_EL1
817 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
818 // MISCREG_DBGWCR0_EL1
819 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
820 // MISCREG_DBGWCR1_EL1
821 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
822 // MISCREG_DBGWCR2_EL1
823 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
824 // MISCREG_DBGWCR3_EL1
825 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
826 // MISCREG_MDCCSR_EL0
827 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000001")),
829 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
830 // MISCREG_MDDTRTX_EL0
831 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
832 // MISCREG_MDDTRRX_EL0
833 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
834 // MISCREG_DBGVCR32_EL2
835 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
837 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000001")),
839 bitset
<NUM_MISCREG_INFOS
>(string("10101111111111000001")),
841 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000001")),
843 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
844 // MISCREG_DBGPRCR_EL1
845 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
846 // MISCREG_DBGCLAIMSET_EL1
847 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
848 // MISCREG_DBGCLAIMCLR_EL1
849 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
850 // MISCREG_DBGAUTHSTATUS_EL1
851 bitset
<NUM_MISCREG_INFOS
>(string("01011111111111000001")),
852 // MISCREG_TEECR32_EL1
853 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000000001")),
854 // MISCREG_TEEHBR32_EL1
855 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000000001")),
857 // AArch64 registers (Op0=1,3)
859 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
861 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
862 // MISCREG_REVIDR_EL1
863 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
864 // MISCREG_ID_PFR0_EL1
865 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
866 // MISCREG_ID_PFR1_EL1
867 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
868 // MISCREG_ID_DFR0_EL1
869 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
870 // MISCREG_ID_AFR0_EL1
871 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
872 // MISCREG_ID_MMFR0_EL1
873 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
874 // MISCREG_ID_MMFR1_EL1
875 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
876 // MISCREG_ID_MMFR2_EL1
877 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
878 // MISCREG_ID_MMFR3_EL1
879 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
880 // MISCREG_ID_ISAR0_EL1
881 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
882 // MISCREG_ID_ISAR1_EL1
883 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
884 // MISCREG_ID_ISAR2_EL1
885 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
886 // MISCREG_ID_ISAR3_EL1
887 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
888 // MISCREG_ID_ISAR4_EL1
889 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
890 // MISCREG_ID_ISAR5_EL1
891 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
893 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
895 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
897 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
898 // MISCREG_ID_AA64PFR0_EL1
899 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
900 // MISCREG_ID_AA64PFR1_EL1
901 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
902 // MISCREG_ID_AA64DFR0_EL1
903 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
904 // MISCREG_ID_AA64DFR1_EL1
905 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
906 // MISCREG_ID_AA64AFR0_EL1
907 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
908 // MISCREG_ID_AA64AFR1_EL1
909 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
910 // MISCREG_ID_AA64ISAR0_EL1
911 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
912 // MISCREG_ID_AA64ISAR1_EL1
913 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
914 // MISCREG_ID_AA64MMFR0_EL1
915 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
916 // MISCREG_ID_AA64MMFR1_EL1
917 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
918 // MISCREG_CCSIDR_EL1
919 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
921 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
923 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
924 // MISCREG_CSSELR_EL1
925 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
927 bitset
<NUM_MISCREG_INFOS
>(string("01010101010101000001")),
929 bitset
<NUM_MISCREG_INFOS
>(string("01010101010101000001")),
931 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
932 // MISCREG_VMPIDR_EL2
933 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
935 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
937 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
939 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
941 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
943 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
945 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
947 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
949 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
951 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
953 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
955 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
957 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
959 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
960 // MISCREG_SDER32_EL3
961 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
963 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
965 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
967 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
969 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
971 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
973 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
975 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
977 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
979 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
981 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
983 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
984 // MISCREG_DACR32_EL2
985 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
987 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
989 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
991 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
993 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
995 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
997 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
999 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1001 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1003 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1004 // MISCREG_DSPSR_EL0
1005 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1007 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1009 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1011 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1013 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1014 // MISCREG_SPSR_IRQ_AA64
1015 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1016 // MISCREG_SPSR_ABT_AA64
1017 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1018 // MISCREG_SPSR_UND_AA64
1019 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1020 // MISCREG_SPSR_FIQ_AA64
1021 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1023 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1025 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1027 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1028 // MISCREG_AFSR0_EL1
1029 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1030 // MISCREG_AFSR1_EL1
1031 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1033 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1034 // MISCREG_IFSR32_EL2
1035 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1036 // MISCREG_AFSR0_EL2
1037 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1038 // MISCREG_AFSR1_EL2
1039 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1041 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1042 // MISCREG_FPEXC32_EL2
1043 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1044 // MISCREG_AFSR0_EL3
1045 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1046 // MISCREG_AFSR1_EL3
1047 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1049 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1051 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1053 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1054 // MISCREG_HPFAR_EL2
1055 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1057 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1058 // MISCREG_IC_IALLUIS
1059 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000101")),
1061 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1063 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000101")),
1064 // MISCREG_DC_IVAC_Xt
1065 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000101")),
1066 // MISCREG_DC_ISW_Xt
1067 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000101")),
1068 // MISCREG_AT_S1E1R_Xt
1069 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1070 // MISCREG_AT_S1E1W_Xt
1071 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1072 // MISCREG_AT_S1E0R_Xt
1073 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1074 // MISCREG_AT_S1E0W_Xt
1075 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1076 // MISCREG_DC_CSW_Xt
1077 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000101")),
1078 // MISCREG_DC_CISW_Xt
1079 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000101")),
1080 // MISCREG_DC_ZVA_Xt
1081 bitset
<NUM_MISCREG_INFOS
>(string("10101010100010000101")),
1082 // MISCREG_IC_IVAU_Xt
1083 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000001")),
1084 // MISCREG_DC_CVAC_Xt
1085 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000101")),
1086 // MISCREG_DC_CVAU_Xt
1087 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000101")),
1088 // MISCREG_DC_CIVAC_Xt
1089 bitset
<NUM_MISCREG_INFOS
>(string("10101010101010000101")),
1090 // MISCREG_AT_S1E2R_Xt
1091 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1092 // MISCREG_AT_S1E2W_Xt
1093 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1094 // MISCREG_AT_S12E1R_Xt
1095 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1096 // MISCREG_AT_S12E1W_Xt
1097 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1098 // MISCREG_AT_S12E0R_Xt
1099 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1100 // MISCREG_AT_S12E0W_Xt
1101 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1102 // MISCREG_AT_S1E3R_Xt
1103 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1104 // MISCREG_AT_S1E3W_Xt
1105 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1106 // MISCREG_TLBI_VMALLE1IS
1107 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1108 // MISCREG_TLBI_VAE1IS_Xt
1109 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1110 // MISCREG_TLBI_ASIDE1IS_Xt
1111 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1112 // MISCREG_TLBI_VAAE1IS_Xt
1113 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1114 // MISCREG_TLBI_VALE1IS_Xt
1115 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1116 // MISCREG_TLBI_VAALE1IS_Xt
1117 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1118 // MISCREG_TLBI_VMALLE1
1119 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1120 // MISCREG_TLBI_VAE1_Xt
1121 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1122 // MISCREG_TLBI_ASIDE1_Xt
1123 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1124 // MISCREG_TLBI_VAAE1_Xt
1125 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1126 // MISCREG_TLBI_VALE1_Xt
1127 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1128 // MISCREG_TLBI_VAALE1_Xt
1129 bitset
<NUM_MISCREG_INFOS
>(string("10101010100000000001")),
1130 // MISCREG_TLBI_IPAS2E1IS_Xt
1131 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1132 // MISCREG_TLBI_IPAS2LE1IS_Xt
1133 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1134 // MISCREG_TLBI_ALLE2IS
1135 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1136 // MISCREG_TLBI_VAE2IS_Xt
1137 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1138 // MISCREG_TLBI_ALLE1IS
1139 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1140 // MISCREG_TLBI_VALE2IS_Xt
1141 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1142 // MISCREG_TLBI_VMALLS12E1IS
1143 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1144 // MISCREG_TLBI_IPAS2E1_Xt
1145 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1146 // MISCREG_TLBI_IPAS2LE1_Xt
1147 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1148 // MISCREG_TLBI_ALLE2
1149 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1150 // MISCREG_TLBI_VAE2_Xt
1151 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1152 // MISCREG_TLBI_ALLE1
1153 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1154 // MISCREG_TLBI_VALE2_Xt
1155 bitset
<NUM_MISCREG_INFOS
>(string("10001000000000000001")),
1156 // MISCREG_TLBI_VMALLS12E1
1157 bitset
<NUM_MISCREG_INFOS
>(string("10101000000000000001")),
1158 // MISCREG_TLBI_ALLE3IS
1159 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1160 // MISCREG_TLBI_VAE3IS_Xt
1161 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1162 // MISCREG_TLBI_VALE3IS_Xt
1163 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1164 // MISCREG_TLBI_ALLE3
1165 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1166 // MISCREG_TLBI_VAE3_Xt
1167 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1168 // MISCREG_TLBI_VALE3_Xt
1169 bitset
<NUM_MISCREG_INFOS
>(string("10100000000000000001")),
1170 // MISCREG_PMINTENSET_EL1
1171 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1172 // MISCREG_PMINTENCLR_EL1
1173 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1175 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1176 // MISCREG_PMCNTENSET_EL0
1177 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1178 // MISCREG_PMCNTENCLR_EL0
1179 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1180 // MISCREG_PMOVSCLR_EL0
1181 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1182 // MISCREG_PMSWINC_EL0
1183 bitset
<NUM_MISCREG_INFOS
>(string("10101010101111000001")),
1184 // MISCREG_PMSELR_EL0
1185 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1186 // MISCREG_PMCEID0_EL0
1187 bitset
<NUM_MISCREG_INFOS
>(string("01010101011111000001")),
1188 // MISCREG_PMCEID1_EL0
1189 bitset
<NUM_MISCREG_INFOS
>(string("01010101011111000001")),
1190 // MISCREG_PMCCNTR_EL0
1191 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1192 // MISCREG_PMXEVTYPER_EL0
1193 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1194 // MISCREG_PMCCFILTR_EL0
1195 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1196 // MISCREG_PMXEVCNTR_EL0
1197 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1198 // MISCREG_PMUSERENR_EL0
1199 bitset
<NUM_MISCREG_INFOS
>(string("11111111110101000001")),
1200 // MISCREG_PMOVSSET_EL0
1201 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1203 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1204 // MISCREG_AMAIR_EL1
1205 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1207 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1208 // MISCREG_AMAIR_EL2
1209 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1211 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1212 // MISCREG_AMAIR_EL3
1213 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1214 // MISCREG_L2CTLR_EL1
1215 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1216 // MISCREG_L2ECTLR_EL1
1217 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1219 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1220 // MISCREG_RVBAR_EL1
1221 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
1223 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
1225 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1226 // MISCREG_RVBAR_EL2
1227 bitset
<NUM_MISCREG_INFOS
>(string("01010100000000000001")),
1229 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1230 // MISCREG_RVBAR_EL3
1231 bitset
<NUM_MISCREG_INFOS
>(string("01010000000000000001")),
1233 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1234 // MISCREG_CONTEXTIDR_EL1
1235 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1236 // MISCREG_TPIDR_EL1
1237 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1238 // MISCREG_TPIDR_EL0
1239 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1240 // MISCREG_TPIDRRO_EL0
1241 bitset
<NUM_MISCREG_INFOS
>(string("11111111110101000001")),
1242 // MISCREG_TPIDR_EL2
1243 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1244 // MISCREG_TPIDR_EL3
1245 bitset
<NUM_MISCREG_INFOS
>(string("11110000000000000001")),
1246 // MISCREG_CNTKCTL_EL1
1247 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1248 // MISCREG_CNTFRQ_EL0
1249 bitset
<NUM_MISCREG_INFOS
>(string("11110101010101000001")),
1250 // MISCREG_CNTPCT_EL0
1251 bitset
<NUM_MISCREG_INFOS
>(string("01010101010101000001")),
1252 // MISCREG_CNTVCT_EL0
1253 bitset
<NUM_MISCREG_INFOS
>(string("01010101010101000011")),
1254 // MISCREG_CNTP_TVAL_EL0
1255 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1256 // MISCREG_CNTP_CTL_EL0
1257 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1258 // MISCREG_CNTP_CVAL_EL0
1259 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1260 // MISCREG_CNTV_TVAL_EL0
1261 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1262 // MISCREG_CNTV_CTL_EL0
1263 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1264 // MISCREG_CNTV_CVAL_EL0
1265 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1266 // MISCREG_PMEVCNTR0_EL0
1267 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1268 // MISCREG_PMEVCNTR1_EL0
1269 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1270 // MISCREG_PMEVCNTR2_EL0
1271 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1272 // MISCREG_PMEVCNTR3_EL0
1273 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1274 // MISCREG_PMEVCNTR4_EL0
1275 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1276 // MISCREG_PMEVCNTR5_EL0
1277 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1278 // MISCREG_PMEVTYPER0_EL0
1279 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1280 // MISCREG_PMEVTYPER1_EL0
1281 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1282 // MISCREG_PMEVTYPER2_EL0
1283 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1284 // MISCREG_PMEVTYPER3_EL0
1285 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1286 // MISCREG_PMEVTYPER4_EL0
1287 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1288 // MISCREG_PMEVTYPER5_EL0
1289 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1290 // MISCREG_CNTVOFF_EL2
1291 bitset
<NUM_MISCREG_INFOS
>(string("11111100000000000001")),
1292 // MISCREG_CNTHCTL_EL2
1293 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1294 // MISCREG_CNTHP_TVAL_EL2
1295 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1296 // MISCREG_CNTHP_CTL_EL2
1297 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1298 // MISCREG_CNTHP_CVAL_EL2
1299 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1300 // MISCREG_CNTPS_TVAL_EL1
1301 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1302 // MISCREG_CNTPS_CTL_EL1
1303 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1304 // MISCREG_CNTPS_CVAL_EL1
1305 bitset
<NUM_MISCREG_INFOS
>(string("01111000000000000000")),
1306 // MISCREG_IL1DATA0_EL1
1307 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1308 // MISCREG_IL1DATA1_EL1
1309 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1310 // MISCREG_IL1DATA2_EL1
1311 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1312 // MISCREG_IL1DATA3_EL1
1313 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1314 // MISCREG_DL1DATA0_EL1
1315 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1316 // MISCREG_DL1DATA1_EL1
1317 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1318 // MISCREG_DL1DATA2_EL1
1319 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1320 // MISCREG_DL1DATA3_EL1
1321 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1322 // MISCREG_DL1DATA4_EL1
1323 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1324 // MISCREG_L2ACTLR_EL1
1325 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1326 // MISCREG_CPUACTLR_EL1
1327 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1328 // MISCREG_CPUECTLR_EL1
1329 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1330 // MISCREG_CPUMERRSR_EL1
1331 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000001")),
1332 // MISCREG_L2MERRSR_EL1
1333 bitset
<NUM_MISCREG_INFOS
>(string("11111111110000000100")),
1335 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
1339 bitset
<NUM_MISCREG_INFOS
>(string("11111111111111000001")),
1341 bitset
<NUM_MISCREG_INFOS
>(string("01010101010000000001")),
1342 // MISCREG_CP14_UNIMPL
1343 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000000100")),
1344 // MISCREG_CP15_UNIMPL
1345 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000000100")),
1346 // MISCREG_A64_UNIMPL
1347 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000000100")),
1349 bitset
<NUM_MISCREG_INFOS
>(string("00000000000000000001"))
1353 decodeCP15Reg(unsigned crn
, unsigned opc1
, unsigned crm
, unsigned opc2
)
1365 return MISCREG_TCMTR
;
1367 return MISCREG_TLBTR
;
1369 return MISCREG_MPIDR
;
1371 return MISCREG_REVIDR
;
1373 return MISCREG_MIDR
;
1379 return MISCREG_ID_PFR0
;
1381 return MISCREG_ID_PFR1
;
1383 return MISCREG_ID_DFR0
;
1385 return MISCREG_ID_AFR0
;
1387 return MISCREG_ID_MMFR0
;
1389 return MISCREG_ID_MMFR1
;
1391 return MISCREG_ID_MMFR2
;
1393 return MISCREG_ID_MMFR3
;
1399 return MISCREG_ID_ISAR0
;
1401 return MISCREG_ID_ISAR1
;
1403 return MISCREG_ID_ISAR2
;
1405 return MISCREG_ID_ISAR3
;
1407 return MISCREG_ID_ISAR4
;
1409 return MISCREG_ID_ISAR5
;
1412 return MISCREG_RAZ
; // read as zero
1416 return MISCREG_RAZ
; // read as zero
1423 return MISCREG_CCSIDR
;
1425 return MISCREG_CLIDR
;
1427 return MISCREG_AIDR
;
1432 if (crm
== 0 && opc2
== 0) {
1433 return MISCREG_CSSELR
;
1439 return MISCREG_VPIDR
;
1441 return MISCREG_VMPIDR
;
1451 return MISCREG_SCTLR
;
1453 return MISCREG_ACTLR
;
1455 return MISCREG_CPACR
;
1457 } else if (crm
== 1) {
1462 return MISCREG_SDER
;
1464 return MISCREG_NSACR
;
1467 } else if (opc1
== 4) {
1470 return MISCREG_HSCTLR
;
1472 return MISCREG_HACTLR
;
1473 } else if (crm
== 1) {
1478 return MISCREG_HDCR
;
1480 return MISCREG_HCPTR
;
1482 return MISCREG_HSTR
;
1484 return MISCREG_HACR
;
1490 if (opc1
== 0 && crm
== 0) {
1493 return MISCREG_TTBR0
;
1495 return MISCREG_TTBR1
;
1497 return MISCREG_TTBCR
;
1499 } else if (opc1
== 4) {
1500 if (crm
== 0 && opc2
== 2)
1501 return MISCREG_HTCR
;
1502 else if (crm
== 1 && opc2
== 2)
1503 return MISCREG_VTCR
;
1507 if (opc1
== 0 && crm
== 0 && opc2
== 0) {
1508 return MISCREG_DACR
;
1515 return MISCREG_DFSR
;
1516 } else if (opc2
== 1) {
1517 return MISCREG_IFSR
;
1519 } else if (crm
== 1) {
1521 return MISCREG_ADFSR
;
1522 } else if (opc2
== 1) {
1523 return MISCREG_AIFSR
;
1526 } else if (opc1
== 4) {
1529 return MISCREG_HADFSR
;
1531 return MISCREG_HAIFSR
;
1532 } else if (crm
== 2 && opc2
== 0) {
1538 if (opc1
== 0 && crm
== 0) {
1541 return MISCREG_DFAR
;
1543 return MISCREG_IFAR
;
1545 } else if (opc1
== 4 && crm
== 0) {
1548 return MISCREG_HDFAR
;
1550 return MISCREG_HIFAR
;
1552 return MISCREG_HPFAR
;
1567 return MISCREG_ICIALLUIS
;
1569 return MISCREG_BPIALLIS
;
1580 return MISCREG_ICIALLU
;
1582 return MISCREG_ICIMVAU
;
1584 return MISCREG_CP15ISB
;
1586 return MISCREG_BPIALL
;
1588 return MISCREG_BPIMVA
;
1593 return MISCREG_DCIMVAC
;
1594 } else if (opc2
== 2) {
1595 return MISCREG_DCISW
;
1601 return MISCREG_ATS1CPR
;
1603 return MISCREG_ATS1CPW
;
1605 return MISCREG_ATS1CUR
;
1607 return MISCREG_ATS1CUW
;
1609 return MISCREG_ATS12NSOPR
;
1611 return MISCREG_ATS12NSOPW
;
1613 return MISCREG_ATS12NSOUR
;
1615 return MISCREG_ATS12NSOUW
;
1621 return MISCREG_DCCMVAC
;
1623 return MISCREG_DCCSW
;
1625 return MISCREG_CP15DSB
;
1627 return MISCREG_CP15DMB
;
1632 return MISCREG_DCCMVAU
;
1642 return MISCREG_DCCIMVAC
;
1643 } else if (opc2
== 2) {
1644 return MISCREG_DCCISW
;
1648 } else if (opc1
== 4 && crm
== 8) {
1650 return MISCREG_ATS1HR
;
1652 return MISCREG_ATS1HW
;
1661 return MISCREG_TLBIALLIS
;
1663 return MISCREG_TLBIMVAIS
;
1665 return MISCREG_TLBIASIDIS
;
1667 return MISCREG_TLBIMVAAIS
;
1673 return MISCREG_ITLBIALL
;
1675 return MISCREG_ITLBIMVA
;
1677 return MISCREG_ITLBIASID
;
1683 return MISCREG_DTLBIALL
;
1685 return MISCREG_DTLBIMVA
;
1687 return MISCREG_DTLBIASID
;
1693 return MISCREG_TLBIALL
;
1695 return MISCREG_TLBIMVA
;
1697 return MISCREG_TLBIASID
;
1699 return MISCREG_TLBIMVAA
;
1703 } else if (opc1
== 4) {
1707 return MISCREG_TLBIALLHIS
;
1709 return MISCREG_TLBIMVAHIS
;
1711 return MISCREG_TLBIALLNSNHIS
;
1713 } else if (crm
== 7) {
1716 return MISCREG_TLBIALLH
;
1718 return MISCREG_TLBIMVAH
;
1720 return MISCREG_TLBIALLNSNH
;
1731 return MISCREG_PMCR
;
1733 return MISCREG_PMCNTENSET
;
1735 return MISCREG_PMCNTENCLR
;
1737 return MISCREG_PMOVSR
;
1739 return MISCREG_PMSWINC
;
1741 return MISCREG_PMSELR
;
1743 return MISCREG_PMCEID0
;
1745 return MISCREG_PMCEID1
;
1751 return MISCREG_PMCCNTR
;
1753 // Selector is PMSELR.SEL
1754 return MISCREG_PMXEVTYPER_PMCCFILTR
;
1756 return MISCREG_PMXEVCNTR
;
1762 return MISCREG_PMUSERENR
;
1764 return MISCREG_PMINTENSET
;
1766 return MISCREG_PMINTENCLR
;
1768 return MISCREG_PMOVSSET
;
1772 } else if (opc1
== 1) {
1776 case 2: // L2CTLR, L2 Control Register
1777 return MISCREG_L2CTLR
;
1779 return MISCREG_L2ECTLR
;
1788 // crm 0, 1, 4, and 8, with op2 0 - 7, reserved for TLB lockdown
1789 if (crm
== 2) { // TEX Remap Registers
1791 // Selector is TTBCR.EAE
1792 return MISCREG_PRRR_MAIR0
;
1793 } else if (opc2
== 1) {
1794 // Selector is TTBCR.EAE
1795 return MISCREG_NMRR_MAIR1
;
1797 } else if (crm
== 3) {
1799 return MISCREG_AMAIR0
;
1800 } else if (opc2
== 1) {
1801 return MISCREG_AMAIR1
;
1804 } else if (opc1
== 4) {
1805 // crm 0, 1, 4, and 8, with op2 0 - 7, reserved for TLB lockdown
1808 return MISCREG_HMAIR0
;
1810 return MISCREG_HMAIR1
;
1811 } else if (crm
== 3) {
1813 return MISCREG_HAMAIR0
;
1815 return MISCREG_HAMAIR1
;
1832 // Reserved for DMA operations for TCM access
1841 return MISCREG_VBAR
;
1842 } else if (opc2
== 1) {
1843 return MISCREG_MVBAR
;
1845 } else if (crm
== 1) {
1850 } else if (opc1
== 4) {
1851 if (crm
== 0 && opc2
== 0)
1852 return MISCREG_HVBAR
;
1860 return MISCREG_FCSEIDR
;
1862 return MISCREG_CONTEXTIDR
;
1864 return MISCREG_TPIDRURW
;
1866 return MISCREG_TPIDRURO
;
1868 return MISCREG_TPIDRPRW
;
1871 } else if (opc1
== 4) {
1872 if (crm
== 0 && opc2
== 2)
1873 return MISCREG_HTPIDR
;
1881 return MISCREG_CNTFRQ
;
1885 return MISCREG_CNTKCTL
;
1889 return MISCREG_CNTP_TVAL
;
1891 return MISCREG_CNTP_CTL
;
1895 return MISCREG_CNTV_TVAL
;
1897 return MISCREG_CNTV_CTL
;
1900 } else if (opc1
== 4) {
1901 if (crm
== 1 && opc2
== 0) {
1902 return MISCREG_CNTHCTL
;
1903 } else if (crm
== 2) {
1905 return MISCREG_CNTHP_TVAL
;
1907 return MISCREG_CNTHP_CTL
;
1912 // Implementation defined
1913 return MISCREG_CP15_UNIMPL
;
1915 // Unrecognized register
1916 return MISCREG_CP15_UNIMPL
;
1920 decodeCP15Reg64(unsigned crm
, unsigned opc1
)
1926 return MISCREG_TTBR0
;
1928 return MISCREG_TTBR1
;
1930 return MISCREG_HTTBR
;
1932 return MISCREG_VTTBR
;
1942 return MISCREG_CNTPCT
;
1944 return MISCREG_CNTVCT
;
1946 return MISCREG_CNTP_CVAL
;
1948 return MISCREG_CNTV_CVAL
;
1950 return MISCREG_CNTVOFF
;
1952 return MISCREG_CNTHP_CVAL
;
1957 return MISCREG_CPUMERRSR
;
1959 return MISCREG_L2MERRSR
;
1962 // Unrecognized register
1963 return MISCREG_CP15_UNIMPL
;
1967 canReadCoprocReg(MiscRegIndex reg
, SCR scr
, CPSR cpsr
, ThreadContext
*tc
)
1969 bool secure
= !scr
.ns
;
1972 switch (cpsr
.mode
) {
1974 canRead
= secure
? miscRegInfo
[reg
][MISCREG_USR_S_RD
] :
1975 miscRegInfo
[reg
][MISCREG_USR_NS_RD
];
1981 case MODE_UNDEFINED
:
1983 canRead
= secure
? miscRegInfo
[reg
][MISCREG_PRI_S_RD
] :
1984 miscRegInfo
[reg
][MISCREG_PRI_NS_RD
];
1987 canRead
= secure
? miscRegInfo
[reg
][MISCREG_MON_NS0_RD
] :
1988 miscRegInfo
[reg
][MISCREG_MON_NS1_RD
];
1991 canRead
= miscRegInfo
[reg
][MISCREG_HYP_RD
];
1994 panic("Unrecognized mode setting in CPSR.\n");
1996 // can't do permissions checkes on the root of a banked pair of regs
1997 assert(!miscRegInfo
[reg
][MISCREG_BANKED
]);
2002 canWriteCoprocReg(MiscRegIndex reg
, SCR scr
, CPSR cpsr
, ThreadContext
*tc
)
2004 bool secure
= !scr
.ns
;
2007 switch (cpsr
.mode
) {
2009 canWrite
= secure
? miscRegInfo
[reg
][MISCREG_USR_S_WR
] :
2010 miscRegInfo
[reg
][MISCREG_USR_NS_WR
];
2016 case MODE_UNDEFINED
:
2018 canWrite
= secure
? miscRegInfo
[reg
][MISCREG_PRI_S_WR
] :
2019 miscRegInfo
[reg
][MISCREG_PRI_NS_WR
];
2022 canWrite
= secure
? miscRegInfo
[reg
][MISCREG_MON_NS0_WR
] :
2023 miscRegInfo
[reg
][MISCREG_MON_NS1_WR
];
2026 canWrite
= miscRegInfo
[reg
][MISCREG_HYP_WR
];
2029 panic("Unrecognized mode setting in CPSR.\n");
2031 // can't do permissions checkes on the root of a banked pair of regs
2032 assert(!miscRegInfo
[reg
][MISCREG_BANKED
]);
2037 flattenMiscRegNsBanked(MiscRegIndex reg
, ThreadContext
*tc
)
2039 int reg_as_int
= static_cast<int>(reg
);
2040 if (miscRegInfo
[reg
][MISCREG_BANKED
]) {
2041 SCR scr
= tc
->readMiscReg(MISCREG_SCR
);
2042 reg_as_int
+= (ArmSystem::haveSecurity(tc
) && !scr
.ns
) ? 2 : 1;
2048 flattenMiscRegNsBanked(MiscRegIndex reg
, ThreadContext
*tc
, bool ns
)
2050 int reg_as_int
= static_cast<int>(reg
);
2051 if (miscRegInfo
[reg
][MISCREG_BANKED
]) {
2052 reg_as_int
+= (ArmSystem::haveSecurity(tc
) && !ns
) ? 2 : 1;
2059 * If the reg is a child reg of a banked set, then the parent is the last
2060 * banked one in the list. This is messy, and the wish is to eventually have
2061 * the bitmap replaced with a better data structure. the preUnflatten function
2062 * initializes a lookup table to speed up the search for these banked
2066 int unflattenResultMiscReg
[NUM_MISCREGS
];
2069 preUnflattenMiscReg()
2072 for (int i
= 0 ; i
< NUM_MISCREGS
; i
++){
2073 if (miscRegInfo
[i
][MISCREG_BANKED
])
2075 if (miscRegInfo
[i
][MISCREG_BANKED_CHILD
])
2076 unflattenResultMiscReg
[i
] = reg
;
2078 unflattenResultMiscReg
[i
] = i
;
2079 // if this assert fails, no parent was found, and something is broken
2080 assert(unflattenResultMiscReg
[i
] > -1);
2085 unflattenMiscReg(int reg
)
2087 return unflattenResultMiscReg
[reg
];
2091 canReadAArch64SysReg(MiscRegIndex reg
, SCR scr
, CPSR cpsr
, ThreadContext
*tc
)
2093 // Check for SP_EL0 access while SPSEL == 0
2094 if ((reg
== MISCREG_SP_EL0
) && (tc
->readMiscReg(MISCREG_SPSEL
) == 0))
2097 // Check for RVBAR access
2098 if (reg
== MISCREG_RVBAR_EL1
) {
2099 ExceptionLevel highest_el
= ArmSystem::highestEL(tc
);
2100 if (highest_el
== EL2
|| highest_el
== EL3
)
2103 if (reg
== MISCREG_RVBAR_EL2
) {
2104 ExceptionLevel highest_el
= ArmSystem::highestEL(tc
);
2105 if (highest_el
== EL3
)
2109 bool secure
= ArmSystem::haveSecurity(tc
) && !scr
.ns
;
2111 switch (opModeToEL((OperatingMode
) (uint8_t) cpsr
.mode
)) {
2113 return secure
? miscRegInfo
[reg
][MISCREG_USR_S_RD
] :
2114 miscRegInfo
[reg
][MISCREG_USR_NS_RD
];
2116 return secure
? miscRegInfo
[reg
][MISCREG_PRI_S_RD
] :
2117 miscRegInfo
[reg
][MISCREG_PRI_NS_RD
];
2118 // @todo: uncomment this to enable Virtualization
2120 // return miscRegInfo[reg][MISCREG_HYP_RD];
2122 return secure
? miscRegInfo
[reg
][MISCREG_MON_NS0_RD
] :
2123 miscRegInfo
[reg
][MISCREG_MON_NS1_RD
];
2125 panic("Invalid exception level");
2130 canWriteAArch64SysReg(MiscRegIndex reg
, SCR scr
, CPSR cpsr
, ThreadContext
*tc
)
2132 // Check for SP_EL0 access while SPSEL == 0
2133 if ((reg
== MISCREG_SP_EL0
) && (tc
->readMiscReg(MISCREG_SPSEL
) == 0))
2135 ExceptionLevel el
= opModeToEL((OperatingMode
) (uint8_t) cpsr
.mode
);
2136 if (reg
== MISCREG_DAIF
) {
2137 SCTLR sctlr
= tc
->readMiscReg(MISCREG_SCTLR_EL1
);
2138 if (el
== EL0
&& !sctlr
.uma
)
2141 if (reg
== MISCREG_DC_ZVA_Xt
) {
2142 SCTLR sctlr
= tc
->readMiscReg(MISCREG_SCTLR_EL1
);
2143 if (el
== EL0
&& !sctlr
.dze
)
2146 if (reg
== MISCREG_DC_CVAC_Xt
|| reg
== MISCREG_DC_CIVAC_Xt
) {
2147 SCTLR sctlr
= tc
->readMiscReg(MISCREG_SCTLR_EL1
);
2148 if (el
== EL0
&& !sctlr
.uci
)
2152 bool secure
= ArmSystem::haveSecurity(tc
) && !scr
.ns
;
2156 return secure
? miscRegInfo
[reg
][MISCREG_USR_S_WR
] :
2157 miscRegInfo
[reg
][MISCREG_USR_NS_WR
];
2159 return secure
? miscRegInfo
[reg
][MISCREG_PRI_S_WR
] :
2160 miscRegInfo
[reg
][MISCREG_PRI_NS_WR
];
2161 // @todo: uncomment this to enable Virtualization
2163 // return miscRegInfo[reg][MISCREG_HYP_WR];
2165 return secure
? miscRegInfo
[reg
][MISCREG_MON_NS0_WR
] :
2166 miscRegInfo
[reg
][MISCREG_MON_NS1_WR
];
2168 panic("Invalid exception level");
2173 decodeAArch64SysReg(unsigned op0
, unsigned op1
,
2174 unsigned crn
, unsigned crm
,
2187 return MISCREG_IC_IALLUIS
;
2193 return MISCREG_IC_IALLU
;
2199 return MISCREG_DC_IVAC_Xt
;
2201 return MISCREG_DC_ISW_Xt
;
2207 return MISCREG_AT_S1E1R_Xt
;
2209 return MISCREG_AT_S1E1W_Xt
;
2211 return MISCREG_AT_S1E0R_Xt
;
2213 return MISCREG_AT_S1E0W_Xt
;
2219 return MISCREG_DC_CSW_Xt
;
2225 return MISCREG_DC_CISW_Xt
;
2235 return MISCREG_DC_ZVA_Xt
;
2241 return MISCREG_IC_IVAU_Xt
;
2247 return MISCREG_DC_CVAC_Xt
;
2253 return MISCREG_DC_CVAU_Xt
;
2259 return MISCREG_DC_CIVAC_Xt
;
2269 return MISCREG_AT_S1E2R_Xt
;
2271 return MISCREG_AT_S1E2W_Xt
;
2273 return MISCREG_AT_S12E1R_Xt
;
2275 return MISCREG_AT_S12E1W_Xt
;
2277 return MISCREG_AT_S12E0R_Xt
;
2279 return MISCREG_AT_S12E0W_Xt
;
2289 return MISCREG_AT_S1E3R_Xt
;
2291 return MISCREG_AT_S1E3W_Xt
;
2305 return MISCREG_TLBI_VMALLE1IS
;
2307 return MISCREG_TLBI_VAE1IS_Xt
;
2309 return MISCREG_TLBI_ASIDE1IS_Xt
;
2311 return MISCREG_TLBI_VAAE1IS_Xt
;
2313 return MISCREG_TLBI_VALE1IS_Xt
;
2315 return MISCREG_TLBI_VAALE1IS_Xt
;
2321 return MISCREG_TLBI_VMALLE1
;
2323 return MISCREG_TLBI_VAE1_Xt
;
2325 return MISCREG_TLBI_ASIDE1_Xt
;
2327 return MISCREG_TLBI_VAAE1_Xt
;
2329 return MISCREG_TLBI_VALE1_Xt
;
2331 return MISCREG_TLBI_VAALE1_Xt
;
2341 return MISCREG_TLBI_IPAS2E1IS_Xt
;
2343 return MISCREG_TLBI_IPAS2LE1IS_Xt
;
2349 return MISCREG_TLBI_ALLE2IS
;
2351 return MISCREG_TLBI_VAE2IS_Xt
;
2353 return MISCREG_TLBI_ALLE1IS
;
2355 return MISCREG_TLBI_VALE2IS_Xt
;
2357 return MISCREG_TLBI_VMALLS12E1IS
;
2363 return MISCREG_TLBI_IPAS2E1_Xt
;
2365 return MISCREG_TLBI_IPAS2LE1_Xt
;
2371 return MISCREG_TLBI_ALLE2
;
2373 return MISCREG_TLBI_VAE2_Xt
;
2375 return MISCREG_TLBI_ALLE1
;
2377 return MISCREG_TLBI_VALE2_Xt
;
2379 return MISCREG_TLBI_VMALLS12E1
;
2389 return MISCREG_TLBI_ALLE3IS
;
2391 return MISCREG_TLBI_VAE3IS_Xt
;
2393 return MISCREG_TLBI_VALE3IS_Xt
;
2399 return MISCREG_TLBI_ALLE3
;
2401 return MISCREG_TLBI_VAE3_Xt
;
2403 return MISCREG_TLBI_VALE3_Xt
;
2421 return MISCREG_OSDTRRX_EL1
;
2423 return MISCREG_DBGBVR0_EL1
;
2425 return MISCREG_DBGBCR0_EL1
;
2427 return MISCREG_DBGWVR0_EL1
;
2429 return MISCREG_DBGWCR0_EL1
;
2435 return MISCREG_DBGBVR1_EL1
;
2437 return MISCREG_DBGBCR1_EL1
;
2439 return MISCREG_DBGWVR1_EL1
;
2441 return MISCREG_DBGWCR1_EL1
;
2447 return MISCREG_MDCCINT_EL1
;
2449 return MISCREG_MDSCR_EL1
;
2451 return MISCREG_DBGBVR2_EL1
;
2453 return MISCREG_DBGBCR2_EL1
;
2455 return MISCREG_DBGWVR2_EL1
;
2457 return MISCREG_DBGWCR2_EL1
;
2463 return MISCREG_OSDTRTX_EL1
;
2465 return MISCREG_DBGBVR3_EL1
;
2467 return MISCREG_DBGBCR3_EL1
;
2469 return MISCREG_DBGWVR3_EL1
;
2471 return MISCREG_DBGWCR3_EL1
;
2477 return MISCREG_DBGBVR4_EL1
;
2479 return MISCREG_DBGBCR4_EL1
;
2485 return MISCREG_DBGBVR5_EL1
;
2487 return MISCREG_DBGBCR5_EL1
;
2493 return MISCREG_OSECCR_EL1
;
2503 return MISCREG_TEECR32_EL1
;
2513 return MISCREG_MDCCSR_EL0
;
2519 return MISCREG_MDDTR_EL0
;
2525 return MISCREG_MDDTRRX_EL0
;
2535 return MISCREG_DBGVCR32_EL2
;
2549 return MISCREG_MDRAR_EL1
;
2551 return MISCREG_OSLAR_EL1
;
2557 return MISCREG_OSLSR_EL1
;
2563 return MISCREG_OSDLR_EL1
;
2569 return MISCREG_DBGPRCR_EL1
;
2579 return MISCREG_TEEHBR32_EL1
;
2593 return MISCREG_DBGCLAIMSET_EL1
;
2599 return MISCREG_DBGCLAIMCLR_EL1
;
2605 return MISCREG_DBGAUTHSTATUS_EL1
;
2623 return MISCREG_MIDR_EL1
;
2625 return MISCREG_MPIDR_EL1
;
2627 return MISCREG_REVIDR_EL1
;
2633 return MISCREG_ID_PFR0_EL1
;
2635 return MISCREG_ID_PFR1_EL1
;
2637 return MISCREG_ID_DFR0_EL1
;
2639 return MISCREG_ID_AFR0_EL1
;
2641 return MISCREG_ID_MMFR0_EL1
;
2643 return MISCREG_ID_MMFR1_EL1
;
2645 return MISCREG_ID_MMFR2_EL1
;
2647 return MISCREG_ID_MMFR3_EL1
;
2653 return MISCREG_ID_ISAR0_EL1
;
2655 return MISCREG_ID_ISAR1_EL1
;
2657 return MISCREG_ID_ISAR2_EL1
;
2659 return MISCREG_ID_ISAR3_EL1
;
2661 return MISCREG_ID_ISAR4_EL1
;
2663 return MISCREG_ID_ISAR5_EL1
;
2669 return MISCREG_MVFR0_EL1
;
2671 return MISCREG_MVFR1_EL1
;
2673 return MISCREG_MVFR2_EL1
;
2681 return MISCREG_ID_AA64PFR0_EL1
;
2683 return MISCREG_ID_AA64PFR1_EL1
;
2691 return MISCREG_ID_AA64DFR0_EL1
;
2693 return MISCREG_ID_AA64DFR1_EL1
;
2695 return MISCREG_ID_AA64AFR0_EL1
;
2697 return MISCREG_ID_AA64AFR1_EL1
;
2708 return MISCREG_ID_AA64ISAR0_EL1
;
2710 return MISCREG_ID_AA64ISAR1_EL1
;
2718 return MISCREG_ID_AA64MMFR0_EL1
;
2720 return MISCREG_ID_AA64MMFR1_EL1
;
2732 return MISCREG_CCSIDR_EL1
;
2734 return MISCREG_CLIDR_EL1
;
2736 return MISCREG_AIDR_EL1
;
2746 return MISCREG_CSSELR_EL1
;
2756 return MISCREG_CTR_EL0
;
2758 return MISCREG_DCZID_EL0
;
2768 return MISCREG_VPIDR_EL2
;
2770 return MISCREG_VMPIDR_EL2
;
2784 return MISCREG_SCTLR_EL1
;
2786 return MISCREG_ACTLR_EL1
;
2788 return MISCREG_CPACR_EL1
;
2798 return MISCREG_SCTLR_EL2
;
2800 return MISCREG_ACTLR_EL2
;
2806 return MISCREG_HCR_EL2
;
2808 return MISCREG_MDCR_EL2
;
2810 return MISCREG_CPTR_EL2
;
2812 return MISCREG_HSTR_EL2
;
2814 return MISCREG_HACR_EL2
;
2824 return MISCREG_SCTLR_EL3
;
2826 return MISCREG_ACTLR_EL3
;
2832 return MISCREG_SCR_EL3
;
2834 return MISCREG_SDER32_EL3
;
2836 return MISCREG_CPTR_EL3
;
2842 return MISCREG_MDCR_EL3
;
2856 return MISCREG_TTBR0_EL1
;
2858 return MISCREG_TTBR1_EL1
;
2860 return MISCREG_TCR_EL1
;
2870 return MISCREG_TTBR0_EL2
;
2872 return MISCREG_TCR_EL2
;
2878 return MISCREG_VTTBR_EL2
;
2880 return MISCREG_VTCR_EL2
;
2890 return MISCREG_TTBR0_EL3
;
2892 return MISCREG_TCR_EL3
;
2906 return MISCREG_DACR32_EL2
;
2920 return MISCREG_SPSR_EL1
;
2922 return MISCREG_ELR_EL1
;
2928 return MISCREG_SP_EL0
;
2934 return MISCREG_SPSEL
;
2936 return MISCREG_CURRENTEL
;
2946 return MISCREG_NZCV
;
2948 return MISCREG_DAIF
;
2954 return MISCREG_FPCR
;
2956 return MISCREG_FPSR
;
2962 return MISCREG_DSPSR_EL0
;
2964 return MISCREG_DLR_EL0
;
2974 return MISCREG_SPSR_EL2
;
2976 return MISCREG_ELR_EL2
;
2982 return MISCREG_SP_EL1
;
2988 return MISCREG_SPSR_IRQ_AA64
;
2990 return MISCREG_SPSR_ABT_AA64
;
2992 return MISCREG_SPSR_UND_AA64
;
2994 return MISCREG_SPSR_FIQ_AA64
;
3004 return MISCREG_SPSR_EL3
;
3006 return MISCREG_ELR_EL3
;
3012 return MISCREG_SP_EL2
;
3026 return MISCREG_AFSR0_EL1
;
3028 return MISCREG_AFSR1_EL1
;
3034 return MISCREG_ESR_EL1
;
3044 return MISCREG_IFSR32_EL2
;
3050 return MISCREG_AFSR0_EL2
;
3052 return MISCREG_AFSR1_EL2
;
3058 return MISCREG_ESR_EL2
;
3064 return MISCREG_FPEXC32_EL2
;
3074 return MISCREG_AFSR0_EL3
;
3076 return MISCREG_AFSR1_EL3
;
3082 return MISCREG_ESR_EL3
;
3096 return MISCREG_FAR_EL1
;
3106 return MISCREG_FAR_EL2
;
3108 return MISCREG_HPFAR_EL2
;
3118 return MISCREG_FAR_EL3
;
3132 return MISCREG_PAR_EL1
;
3146 return MISCREG_PMINTENSET_EL1
;
3148 return MISCREG_PMINTENCLR_EL1
;
3158 return MISCREG_PMCR_EL0
;
3160 return MISCREG_PMCNTENSET_EL0
;
3162 return MISCREG_PMCNTENCLR_EL0
;
3164 return MISCREG_PMOVSCLR_EL0
;
3166 return MISCREG_PMSWINC_EL0
;
3168 return MISCREG_PMSELR_EL0
;
3170 return MISCREG_PMCEID0_EL0
;
3172 return MISCREG_PMCEID1_EL0
;
3178 return MISCREG_PMCCNTR_EL0
;
3180 return MISCREG_PMCCFILTR_EL0
;
3182 return MISCREG_PMXEVCNTR_EL0
;
3188 return MISCREG_PMUSERENR_EL0
;
3190 return MISCREG_PMOVSSET_EL0
;
3204 return MISCREG_MAIR_EL1
;
3210 return MISCREG_AMAIR_EL1
;
3220 return MISCREG_MAIR_EL2
;
3226 return MISCREG_AMAIR_EL2
;
3236 return MISCREG_MAIR_EL3
;
3242 return MISCREG_AMAIR_EL3
;
3256 return MISCREG_L2CTLR_EL1
;
3258 return MISCREG_L2ECTLR_EL1
;
3272 return MISCREG_VBAR_EL1
;
3274 return MISCREG_RVBAR_EL1
;
3280 return MISCREG_ISR_EL1
;
3290 return MISCREG_VBAR_EL2
;
3292 return MISCREG_RVBAR_EL2
;
3302 return MISCREG_VBAR_EL3
;
3304 return MISCREG_RVBAR_EL3
;
3306 return MISCREG_RMR_EL3
;
3320 return MISCREG_CONTEXTIDR_EL1
;
3322 return MISCREG_TPIDR_EL1
;
3332 return MISCREG_TPIDR_EL0
;
3334 return MISCREG_TPIDRRO_EL0
;
3344 return MISCREG_TPIDR_EL2
;
3354 return MISCREG_TPIDR_EL3
;
3368 return MISCREG_CNTKCTL_EL1
;
3378 return MISCREG_CNTFRQ_EL0
;
3380 return MISCREG_CNTPCT_EL0
;
3382 return MISCREG_CNTVCT_EL0
;
3388 return MISCREG_CNTP_TVAL_EL0
;
3390 return MISCREG_CNTP_CTL_EL0
;
3392 return MISCREG_CNTP_CVAL_EL0
;
3398 return MISCREG_CNTV_TVAL_EL0
;
3400 return MISCREG_CNTV_CTL_EL0
;
3402 return MISCREG_CNTV_CVAL_EL0
;
3408 return MISCREG_PMEVCNTR0_EL0
;
3410 return MISCREG_PMEVCNTR1_EL0
;
3412 return MISCREG_PMEVCNTR2_EL0
;
3414 return MISCREG_PMEVCNTR3_EL0
;
3416 return MISCREG_PMEVCNTR4_EL0
;
3418 return MISCREG_PMEVCNTR5_EL0
;
3424 return MISCREG_PMEVTYPER0_EL0
;
3426 return MISCREG_PMEVTYPER1_EL0
;
3428 return MISCREG_PMEVTYPER2_EL0
;
3430 return MISCREG_PMEVTYPER3_EL0
;
3432 return MISCREG_PMEVTYPER4_EL0
;
3434 return MISCREG_PMEVTYPER5_EL0
;
3444 return MISCREG_CNTVOFF_EL2
;
3450 return MISCREG_CNTHCTL_EL2
;
3456 return MISCREG_CNTHP_TVAL_EL2
;
3458 return MISCREG_CNTHP_CTL_EL2
;
3460 return MISCREG_CNTHP_CVAL_EL2
;
3470 return MISCREG_CNTPS_TVAL_EL1
;
3472 return MISCREG_CNTPS_CTL_EL1
;
3474 return MISCREG_CNTPS_CVAL_EL1
;
3488 return MISCREG_IL1DATA0_EL1
;
3490 return MISCREG_IL1DATA1_EL1
;
3492 return MISCREG_IL1DATA2_EL1
;
3494 return MISCREG_IL1DATA3_EL1
;
3500 return MISCREG_DL1DATA0_EL1
;
3502 return MISCREG_DL1DATA1_EL1
;
3504 return MISCREG_DL1DATA2_EL1
;
3506 return MISCREG_DL1DATA3_EL1
;
3508 return MISCREG_DL1DATA4_EL1
;
3518 return MISCREG_L2ACTLR_EL1
;
3524 return MISCREG_CPUACTLR_EL1
;
3526 return MISCREG_CPUECTLR_EL1
;
3528 return MISCREG_CPUMERRSR_EL1
;
3530 return MISCREG_L2MERRSR_EL1
;
3536 return MISCREG_CBAR_EL1
;
3548 return MISCREG_UNKNOWN
;
3551 } // namespace ArmISA