SPARC: Get rid of the copy/pasted StackTrace stolen from Alpha.
[gem5.git] / src / arch / arm / predecoder.cc
1 /*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * Copyright (c) 2007-2008 The Florida State University
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Gabe Black
42 */
43
44 #include "arch/arm/isa_traits.hh"
45 #include "arch/arm/predecoder.hh"
46 #include "arch/arm/utility.hh"
47 #include "base/trace.hh"
48 #include "cpu/thread_context.hh"
49
50 namespace ArmISA
51 {
52
53 void
54 Predecoder::advanceThumbCond()
55 {
56 uint8_t condMask = itstate.mask;
57 uint8_t thumbCond = itstate.cond;
58 DPRINTF(Predecoder, "Advancing ITSTATE from %#x, %#x.\n",
59 thumbCond, condMask);
60 condMask = condMask << 1;
61 uint8_t newBit = bits(condMask, 4);
62 condMask &= mask(4);
63 if (condMask == 0) {
64 thumbCond = 0;
65 } else {
66 replaceBits(thumbCond, 0, newBit);
67 }
68 DPRINTF(Predecoder, "Advancing ITSTATE to %#x, %#x.\n",
69 thumbCond, condMask);
70 itstate.mask = condMask;
71 itstate.cond = thumbCond;
72 }
73
74 void
75 Predecoder::process()
76 {
77 if (!emi.thumb) {
78 emi.instBits = data;
79 emi.sevenAndFour = bits(data, 7) && bits(data, 4);
80 emi.isMisc = (bits(data, 24, 23) == 0x2 &&
81 bits(data, 20) == 0);
82 DPRINTF(Predecoder, "Arm inst: %#x.\n", (uint64_t)emi);
83 } else {
84 uint16_t word = (data >> (offset * 8));
85 if (bigThumb) {
86 // A 32 bit thumb inst is half collected.
87 emi.instBits = emi.instBits | word;
88 bigThumb = false;
89 offset += 2;
90 DPRINTF(Predecoder, "Second half of 32 bit Thumb: %#x.\n",
91 emi.instBits);
92 if (itstate.mask) {
93 emi.itstate = itstate;
94 advanceThumbCond();
95 emi.newItstate = itstate;
96 }
97 } else {
98 uint16_t highBits = word & 0xF800;
99 if (highBits == 0xE800 || highBits == 0xF000 ||
100 highBits == 0xF800) {
101 // The start of a 32 bit thumb inst.
102 emi.bigThumb = 1;
103 if (offset == 0) {
104 // We've got the whole thing.
105 emi.instBits = (data >> 16) | (data << 16);
106 DPRINTF(Predecoder, "All of 32 bit Thumb: %#x.\n",
107 emi.instBits);
108 offset += 4;
109 if (itstate.mask) {
110 emi.itstate = itstate;
111 advanceThumbCond();
112 emi.newItstate = itstate;
113 }
114 } else {
115 // We only have the first half word.
116 DPRINTF(Predecoder,
117 "First half of 32 bit Thumb.\n");
118 emi.instBits = (uint32_t)word << 16;
119 bigThumb = true;
120 offset += 2;
121 }
122 } else {
123 // A 16 bit thumb inst.
124 offset += 2;
125 emi.instBits = word;
126 // Set the condition code field artificially.
127 emi.condCode = COND_UC;
128 DPRINTF(Predecoder, "16 bit Thumb: %#x.\n",
129 emi.instBits);
130 if (bits(word, 15, 8) == 0xbf &&
131 bits(word, 3, 0) != 0x0) {
132 emi.itstate = itstate;
133 itstate = bits(word, 7, 0);
134 emi.newItstate = itstate;
135 DPRINTF(Predecoder,
136 "IT detected, cond = %#x, mask = %#x\n",
137 itstate.cond, itstate.mask);
138 } else if (itstate.mask) {
139 emi.itstate = itstate;
140 advanceThumbCond();
141 emi.newItstate = itstate;
142 }
143 }
144 }
145 }
146 }
147
148 //Use this to give data to the predecoder. This should be used
149 //when there is control flow.
150 void
151 Predecoder::moreBytes(Addr pc, Addr fetchPC, MachInst inst)
152 {
153 data = inst;
154 offset = (fetchPC >= pc) ? 0 : pc - fetchPC;
155 emi.thumb = isThumb(pc);
156 FPSCR fpscr = tc->readMiscReg(MISCREG_FPSCR);
157 emi.fpscrLen = fpscr.len;
158 emi.fpscrStride = fpscr.stride;
159 CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
160 itstate.top6 = cpsr.it2;
161 itstate.bottom2 = cpsr.it1;
162 process();
163 }
164
165 }