src/arch/arm/predecoder.cc

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006 The Regents of The University of Michigan
  15  * Copyright (c) 2007-2008 The Florida State University
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Gabe Black
  42  */
  43
  44 #include "arch/arm/isa_traits.hh"
  45 #include "arch/arm/predecoder.hh"
  46 #include "base/trace.hh"
  47 #include "cpu/thread_context.hh"
  48
  49 namespace ArmISA
  50 {
  51
  52 void
  53 Predecoder::advanceThumbCond()
  54 {
  55     uint8_t condMask = itstate.mask;
  56     uint8_t thumbCond = itstate.cond;
  57     DPRINTF(Predecoder, "Advancing ITSTATE from %#x, %#x.\n",
  58             thumbCond, condMask);
  59     condMask = condMask << 1;
  60     uint8_t newBit = bits(condMask, 4);
  61     condMask &= mask(4);
  62     if (condMask == 0) {
  63         thumbCond = 0;
  64     } else {
  65         replaceBits(thumbCond, 0, newBit);
  66     }
  67     DPRINTF(Predecoder, "Advancing ITSTATE to %#x, %#x.\n",
  68             thumbCond, condMask);
  69     itstate.mask = condMask;
  70     itstate.cond = thumbCond;
  71 }
  72
  73 void
  74 Predecoder::process()
  75 {
  76     if (!emi.thumb) {
  77         emi.instBits = data;
  78         emi.sevenAndFour = bits(data, 7) && bits(data, 4);
  79         emi.isMisc = (bits(data, 24, 23) == 0x2 &&
  80                       bits(data, 20) == 0);
  81         DPRINTF(Predecoder, "Arm inst: %#x.\n", (uint64_t)emi);
  82     } else {
  83         uint16_t word = (data >> (offset * 8));
  84         if (bigThumb) {
  85             // A 32 bit thumb inst is half collected.
  86             emi.instBits = emi.instBits | word;
  87             bigThumb = false;
  88             offset += 2;
  89             DPRINTF(Predecoder, "Second half of 32 bit Thumb: %#x.\n",
  90                     emi.instBits);
  91             if (itstate.mask) {
  92                 emi.itstate = itstate;
  93                 advanceThumbCond();
  94                 emi.newItstate = itstate;
  95             }
  96         } else {
  97             uint16_t highBits = word & 0xF800;
  98             if (highBits == 0xE800 || highBits == 0xF000 ||
  99                     highBits == 0xF800) {
 100                 // The start of a 32 bit thumb inst.
 101                 emi.bigThumb = 1;
 102                 if (offset == 0) {
 103                     // We've got the whole thing.
 104                     emi.instBits = (data >> 16) | (data << 16);
 105                     DPRINTF(Predecoder, "All of 32 bit Thumb: %#x.\n",
 106                             emi.instBits);
 107                     offset += 4;
 108                     if (itstate.mask) {
 109                         emi.itstate = itstate;
 110                         advanceThumbCond();
 111                         emi.newItstate = itstate;
 112                     }
 113                 } else {
 114                     // We only have the first half word.
 115                     DPRINTF(Predecoder,
 116                             "First half of 32 bit Thumb.\n");
 117                     emi.instBits = (uint32_t)word << 16;
 118                     bigThumb = true;
 119                     offset += 2;
 120                 }
 121             } else {
 122                 // A 16 bit thumb inst.
 123                 offset += 2;
 124                 emi.instBits = word;
 125                 // Set the condition code field artificially.
 126                 emi.condCode = COND_UC;
 127                 DPRINTF(Predecoder, "16 bit Thumb: %#x.\n",
 128                         emi.instBits);
 129                 if (bits(word, 15, 8) == 0xbf &&
 130                         bits(word, 3, 0) != 0x0) {
 131                     emi.itstate = itstate;
 132                     itstate = bits(word, 7, 0);
 133                     emi.newItstate = itstate;
 134                     DPRINTF(Predecoder,
 135                             "IT detected, cond = %#x, mask = %#x\n",
 136                             itstate.cond, itstate.mask);
 137                 } else if (itstate.mask) {
 138                     emi.itstate = itstate;
 139                     advanceThumbCond();
 140                     emi.newItstate = itstate;
 141                 }
 142             }
 143         }
 144     }
 145 }
 146
 147 //Use this to give data to the predecoder. This should be used
 148 //when there is control flow.
 149 void
 150 Predecoder::moreBytes(Addr pc, Addr fetchPC, MachInst inst)
 151 {
 152     data = inst;
 153     offset = (fetchPC >= pc) ? 0 : pc - fetchPC;
 154     emi.thumb = (pc & (ULL(1) << PcTBitShift)) ? 1 : 0;
 155     FPSCR fpscr = tc->readMiscReg(MISCREG_FPSCR);
 156     emi.fpscrLen = fpscr.len;
 157     emi.fpscrStride = fpscr.stride;
 158     CPSR cpsr = tc->readMiscReg(MISCREG_CPSR);
 159     itstate.top6 = cpsr.it2;
 160     itstate.bottom2 = cpsr.it1;
 161     process();
 162 }
 163
 164 }