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15 * Copyright (c) 2007-2008 The Florida State University
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44 #include "arch/arm/isa_traits.hh"
45 #include "arch/arm/predecoder.hh"
46 #include "arch/arm/utility.hh"
47 #include "base/trace.hh"
48 #include "cpu/thread_context.hh"
49 #include "debug/Predecoder.hh"
57 // emi is typically ready, with some caveats below...
62 emi
.sevenAndFour
= bits(data
, 7) && bits(data
, 4);
63 emi
.isMisc
= (bits(data
, 24, 23) == 0x2 &&
66 DPRINTF(Predecoder
, "Arm inst: %#x.\n", (uint64_t)emi
);
68 uint16_t word
= (data
>> (offset
* 8));
70 // A 32 bit thumb inst is half collected.
71 emi
.instBits
= emi
.instBits
| word
;
74 DPRINTF(Predecoder
, "Second half of 32 bit Thumb: %#x.\n",
77 uint16_t highBits
= word
& 0xF800;
78 if (highBits
== 0xE800 || highBits
== 0xF000 ||
80 // The start of a 32 bit thumb inst.
83 // We've got the whole thing.
84 emi
.instBits
= (data
>> 16) | (data
<< 16);
85 DPRINTF(Predecoder
, "All of 32 bit Thumb: %#x.\n",
89 // We only have the first half word.
91 "First half of 32 bit Thumb.\n");
92 emi
.instBits
= (uint32_t)word
<< 16;
99 // A 16 bit thumb inst.
102 // Set the condition code field artificially.
103 emi
.condCode
= COND_UC
;
104 DPRINTF(Predecoder
, "16 bit Thumb: %#x.\n",
106 if (bits(word
, 15, 8) == 0xbf &&
107 bits(word
, 3, 0) != 0x0) {
109 itBits
= bits(word
, 7, 0);
111 "IT detected, cond = %#x, mask = %#x\n",
112 itBits
.cond
, itBits
.mask
);
119 //Use this to give data to the predecoder. This should be used
120 //when there is control flow.
122 Predecoder::moreBytes(const PCState
&pc
, Addr fetchPC
, MachInst inst
)
125 offset
= (fetchPC
>= pc
.instAddr()) ? 0 : pc
.instAddr() - fetchPC
;
126 emi
.thumb
= pc
.thumb();
127 FPSCR fpscr
= tc
->readMiscReg(MISCREG_FPSCR
);
128 emi
.fpscrLen
= fpscr
.len
;
129 emi
.fpscrStride
= fpscr
.stride
;