src/arch/arm/predecoder.hh

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2006 The Regents of The University of Michigan
  15  * Copyright (c) 2007-2008 The Florida State University
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Gabe Black
  42  *          Stephen Hines
  43  */
  44
  45 #ifndef __ARCH_ARM_PREDECODER_HH__
  46 #define __ARCH_ARM_PREDECODER_HH__
  47
  48 #include "arch/arm/types.hh"
  49 #include "base/misc.hh"
  50 #include "base/types.hh"
  51
  52 class ThreadContext;
  53
  54 namespace ArmISA
  55 {
  56     class Predecoder
  57     {
  58       protected:
  59         ThreadContext * tc;
  60         //The extended machine instruction being generated
  61         ExtMachInst emi;
  62         MachInst data;
  63         bool bigThumb;
  64         int offset;
  65
  66       public:
  67         Predecoder(ThreadContext * _tc) :
  68             tc(_tc), data(0), bigThumb(false), offset(0)
  69         {}
  70
  71         ThreadContext * getTC()
  72         {
  73             return tc;
  74         }
  75
  76         void setTC(ThreadContext * _tc)
  77         {
  78             tc = _tc;
  79         }
  80
  81         void reset()
  82         {
  83             bigThumb = false;
  84             offset = 0;
  85             emi = 0;
  86         }
  87
  88         void process()
  89         {
  90             if (!emi.thumb) {
  91                 emi.instBits = data;
  92                 emi.sevenAndFour = bits(data, 7) && bits(data, 4);
  93                 emi.isMisc = (bits(data, 24, 23) == 0x2 &&
  94                               bits(data, 20) == 0);
  95                 DPRINTF(Predecoder, "Arm inst.\n");
  96             } else {
  97                 uint16_t word = (data >> (offset * 8));
  98                 if (bigThumb) {
  99                     // A 32 bit thumb inst is half collected.
 100                     emi.instBits = emi.instBits | word;
 101                     bigThumb = false;
 102                     offset += 2;
 103                     DPRINTF(Predecoder, "Second half of 32 bit Thumb.\n");
 104                 } else {
 105                     uint16_t highBits = word & 0xF800;
 106                     if (highBits == 0xE800 || highBits == 0xF000 ||
 107                             highBits == 0xF800) {
 108                         // The start of a 32 bit thumb inst.
 109                         emi.bigThumb = 1;
 110                         if (offset == 0) {
 111                             // We've got the whole thing.
 112                             DPRINTF(Predecoder,
 113                                     "All of 32 bit Thumb.\n");
 114                             emi.instBits = (data >> 16) | (data << 16);
 115                             offset += 4;
 116                         } else {
 117                             // We only have the first half word.
 118                             DPRINTF(Predecoder,
 119                                     "First half of 32 bit Thumb.\n");
 120                             emi.instBits = (uint32_t)word << 16;
 121                             bigThumb = true;
 122                             offset += 2;
 123                         }
 124                     } else {
 125                         // A 16 bit thumb inst.
 126                         DPRINTF(Predecoder, "16 bit Thumb.\n");
 127                         offset += 2;
 128                         emi.instBits = word;
 129                         // Set the condition code field artificially.
 130                         emi.condCode = COND_UC;
 131                     }
 132                 }
 133             }
 134         }
 135
 136         //Use this to give data to the predecoder. This should be used
 137         //when there is control flow.
 138         void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
 139         {
 140             data = inst;
 141             offset = (fetchPC >= pc) ? 0 : pc - fetchPC;
 142             emi.thumb = (pc & (ULL(1) << PcTBitShift)) ? 1 : 0;
 143             process();
 144         }
 145
 146         //Use this to give data to the predecoder. This should be used
 147         //when instructions are executed in order.
 148         void moreBytes(MachInst machInst)
 149         {
 150             moreBytes(0, 0, machInst);
 151         }
 152
 153         bool needMoreBytes()
 154         {
 155             return sizeof(MachInst) > offset;
 156         }
 157
 158         bool extMachInstReady()
 159         {
 160             // The only way an instruction wouldn't be ready is if this is a
 161             // 32 bit ARM instruction that's not 32 bit aligned.
 162             return !bigThumb;
 163         }
 164
 165         int getInstSize()
 166         {
 167             return (!emi.thumb || emi.bigThumb) ? 4 : 2;
 168         }
 169
 170         //This returns a constant reference to the ExtMachInst to avoid a copy
 171         ExtMachInst getExtMachInst()
 172         {
 173             ExtMachInst thisEmi = emi;
 174             emi = 0;
 175             return thisEmi;
 176         }
 177     };
 178 };
 179
 180 #endif // __ARCH_ARM_PREDECODER_HH__