src/arch/arm/predecoder.hh

   1 /*
   2  * Copyright (c) 2006 The Regents of The University of Michigan
   3  * Copyright (c) 2007-2008 The Florida State University
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are
   8  * met: redistributions of source code must retain the above copyright
   9  * notice, this list of conditions and the following disclaimer;
  10  * redistributions in binary form must reproduce the above copyright
  11  * notice, this list of conditions and the following disclaimer in the
  12  * documentation and/or other materials provided with the distribution;
  13  * neither the name of the copyright holders nor the names of its
  14  * contributors may be used to endorse or promote products derived from
  15  * this software without specific prior written permission.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  18  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  20  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  21  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  22  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  23  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  27  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * Authors: Gabe Black
  30  *          Stephen Hines
  31  */
  32
  33 #ifndef __ARCH_ARM_PREDECODER_HH__
  34 #define __ARCH_ARM_PREDECODER_HH__
  35
  36 #include "arch/arm/types.hh"
  37 #include "base/misc.hh"
  38 #include "base/types.hh"
  39
  40 class ThreadContext;
  41
  42 namespace ArmISA
  43 {
  44     class Predecoder
  45     {
  46       protected:
  47         ThreadContext * tc;
  48         //The extended machine instruction being generated
  49         ExtMachInst emi;
  50
  51       public:
  52         Predecoder(ThreadContext * _tc) : tc(_tc)
  53         {}
  54
  55         ThreadContext * getTC()
  56         {
  57             return tc;
  58         }
  59
  60         void setTC(ThreadContext * _tc)
  61         {
  62             tc = _tc;
  63         }
  64
  65         void process()
  66         {}
  67
  68         void reset()
  69         {}
  70
  71         //Use this to give data to the predecoder. This should be used
  72         //when there is control flow.
  73         void moreBytes(Addr pc, Addr fetchPC, MachInst inst)
  74         {
  75             emi = inst;
  76             emi.sevenAndFour = bits(inst, 7) && bits(inst, 4);
  77             emi.isMisc = (bits(inst, 24, 23) == 0x2 && bits(inst, 20) == 0);
  78         }
  79
  80         //Use this to give data to the predecoder. This should be used
  81         //when instructions are executed in order.
  82         void moreBytes(MachInst machInst)
  83         {
  84             moreBytes(0, 0, machInst);
  85         }
  86
  87         bool needMoreBytes()
  88         {
  89             return true;
  90         }
  91
  92         bool extMachInstReady()
  93         {
  94             return true;
  95         }
  96
  97         //This returns a constant reference to the ExtMachInst to avoid a copy
  98         const ExtMachInst & getExtMachInst()
  99         {
 100             return emi;
 101         }
 102     };
 103 };
 104
 105 #endif // __ARCH_ARM_PREDECODER_HH__