ARM: Fixup native trace support and add some v7/recent stack code
[gem5.git] / src / arch / arm / process.cc
1 /*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2007-2008 The Florida State University
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Stephen Hines
41 * Ali Saidi
42 */
43
44 #include "arch/arm/isa_traits.hh"
45 #include "arch/arm/process.hh"
46 #include "arch/arm/types.hh"
47 #include "base/loader/elf_object.hh"
48 #include "base/loader/object_file.hh"
49 #include "base/misc.hh"
50 #include "cpu/thread_context.hh"
51 #include "mem/page_table.hh"
52 #include "mem/translating_port.hh"
53 #include "sim/process_impl.hh"
54 #include "sim/system.hh"
55
56 using namespace std;
57 using namespace ArmISA;
58
59 ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile,
60 ObjectFile::Arch _arch)
61 : LiveProcess(params, objFile), arch(_arch)
62 {
63 stack_base = 0xbf000000L;
64
65 // Set pointer for next thread stack. Reserve 8M for main stack.
66 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
67
68 // Set up break point (Top of Heap)
69 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
70 brk_point = roundUp(brk_point, VMPageSize);
71
72 // Set up region for mmaps. For now, start at bottom of kuseg space.
73 mmap_start = mmap_end = 0x40000000L;
74 }
75
76 void
77 ArmLiveProcess::startup()
78 {
79 argsInit(MachineBytes, VMPageSize);
80 }
81
82 void
83 ArmLiveProcess::copyStringArray32(std::vector<std::string> &strings,
84 Addr array_ptr, Addr data_ptr,
85 TranslatingPort* memPort)
86 {
87 Addr data_ptr_swap;
88 for (int i = 0; i < strings.size(); ++i) {
89 data_ptr_swap = htog(data_ptr);
90 memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap,
91 sizeof(uint32_t));
92 memPort->writeString(data_ptr, strings[i].c_str());
93 array_ptr += sizeof(uint32_t);
94 data_ptr += strings[i].size() + 1;
95 }
96 // add NULL terminator
97 data_ptr = 0;
98
99 memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(uint32_t));
100 }
101
102 void
103 ArmLiveProcess::argsInit(int intSize, int pageSize)
104 {
105 typedef AuxVector<uint32_t> auxv_t;
106 std::vector<auxv_t> auxv;
107
108 string filename;
109 if (argv.size() < 1)
110 filename = "";
111 else
112 filename = argv[0];
113
114 //We want 16 byte alignment
115 uint64_t align = 16;
116
117 // Overloaded argsInit so that we can fine-tune for ARM architecture
118 Process::startup();
119
120 // load object file into target memory
121 objFile->loadSections(initVirtMem);
122
123 enum ArmCpuFeature {
124 Arm_Swp = 1 << 0,
125 Arm_Half = 1 << 1,
126 Arm_Thumb = 1 << 2,
127 Arm_26Bit = 1 << 3,
128 Arm_FastMult = 1 << 4,
129 Arm_Fpa = 1 << 5,
130 Arm_Vfp = 1 << 6,
131 Arm_Edsp = 1 << 7,
132 Arm_Java = 1 << 8,
133 Arm_Iwmmxt = 1 << 9,
134 Arm_Crunch = 1 << 10,
135 Arm_ThumbEE = 1 << 11,
136 Arm_Neon = 1 << 12,
137 Arm_Vfpv3 = 1 << 13,
138 Arm_Vfpv3d16 = 1 << 14
139 };
140
141 //Setup the auxilliary vectors. These will already have endian conversion.
142 //Auxilliary vectors are loaded only for elf formatted executables.
143 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
144 if (elfObject) {
145 uint32_t features =
146 Arm_Swp |
147 Arm_Half |
148 Arm_Thumb |
149 // Arm_26Bit |
150 Arm_FastMult |
151 // Arm_Fpa |
152 Arm_Vfp |
153 Arm_Edsp |
154 // Arm_Java |
155 // Arm_Iwmmxt |
156 // Arm_Crunch |
157 Arm_ThumbEE |
158 Arm_Neon |
159 Arm_Vfpv3 |
160 Arm_Vfpv3d16 |
161 0;
162
163 //Bits which describe the system hardware capabilities
164 //XXX Figure out what these should be
165 auxv.push_back(auxv_t(M5_AT_HWCAP, features));
166 //The system page size
167 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize));
168 //Frequency at which times() increments
169 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
170 // For statically linked executables, this is the virtual address of the
171 // program header tables if they appear in the executable image
172 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
173 // This is the size of a program header entry from the elf file.
174 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
175 // This is the number of program headers from the original elf file.
176 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
177 //This is the address of the elf "interpreter", It should be set
178 //to 0 for regular executables. It should be something else
179 //(not sure what) for dynamic libraries.
180 auxv.push_back(auxv_t(M5_AT_BASE, 0));
181
182 //XXX Figure out what this should be.
183 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
184 //The entry point to the program
185 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
186 //Different user and group IDs
187 auxv.push_back(auxv_t(M5_AT_UID, uid()));
188 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
189 auxv.push_back(auxv_t(M5_AT_GID, gid()));
190 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
191 //Whether to enable "secure mode" in the executable
192 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
193
194 // Pointer to 16 bytes of random data
195 auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
196
197 //The filename of the program
198 auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
199 //The string "v71" -- ARM v7 architecture
200 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
201 }
202
203 //Figure out how big the initial stack nedes to be
204
205 // A sentry NULL void pointer at the top of the stack.
206 int sentry_size = intSize;
207
208 string platform = "v71";
209 int platform_size = platform.size() + 1;
210
211 // Bytes for AT_RANDOM above, we'll just keep them 0
212 int aux_random_size = 16; // as per the specification
213
214 // The aux vectors are put on the stack in two groups. The first group are
215 // the vectors that are generated as the elf is loaded. The second group
216 // are the ones that were computed ahead of time and include the platform
217 // string.
218 int aux_data_size = filename.size() + 1;
219
220 int env_data_size = 0;
221 for (int i = 0; i < envp.size(); ++i) {
222 env_data_size += envp[i].size() + 1;
223 }
224 int arg_data_size = 0;
225 for (int i = 0; i < argv.size(); ++i) {
226 arg_data_size += argv[i].size() + 1;
227 }
228
229 int info_block_size =
230 sentry_size + env_data_size + arg_data_size +
231 aux_data_size + platform_size + aux_random_size;
232
233 //Each auxilliary vector is two 4 byte words
234 int aux_array_size = intSize * 2 * (auxv.size() + 1);
235
236 int envp_array_size = intSize * (envp.size() + 1);
237 int argv_array_size = intSize * (argv.size() + 1);
238
239 int argc_size = intSize;
240
241 //Figure out the size of the contents of the actual initial frame
242 int frame_size =
243 info_block_size +
244 aux_array_size +
245 envp_array_size +
246 argv_array_size +
247 argc_size;
248
249 //There needs to be padding after the auxiliary vector data so that the
250 //very bottom of the stack is aligned properly.
251 int partial_size = frame_size;
252 int aligned_partial_size = roundUp(partial_size, align);
253 int aux_padding = aligned_partial_size - partial_size;
254
255 int space_needed = frame_size + aux_padding;
256
257 stack_min = stack_base - space_needed;
258 stack_min = roundDown(stack_min, align);
259 stack_size = stack_base - stack_min;
260
261 // map memory
262 pTable->allocate(roundDown(stack_min, pageSize),
263 roundUp(stack_size, pageSize));
264
265 // map out initial stack contents
266 uint32_t sentry_base = stack_base - sentry_size;
267 uint32_t aux_data_base = sentry_base - aux_data_size;
268 uint32_t env_data_base = aux_data_base - env_data_size;
269 uint32_t arg_data_base = env_data_base - arg_data_size;
270 uint32_t platform_base = arg_data_base - platform_size;
271 uint32_t aux_random_base = platform_base - aux_random_size;
272 uint32_t auxv_array_base = aux_random_base - aux_array_size - aux_padding;
273 uint32_t envp_array_base = auxv_array_base - envp_array_size;
274 uint32_t argv_array_base = envp_array_base - argv_array_size;
275 uint32_t argc_base = argv_array_base - argc_size;
276
277 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
278 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
279 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
280 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
281 DPRINTF(Stack, "0x%x - random data\n", aux_random_base);
282 DPRINTF(Stack, "0x%x - platform base\n", platform_base);
283 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
284 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
285 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
286 DPRINTF(Stack, "0x%x - argc \n", argc_base);
287 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
288
289 // write contents to stack
290
291 // figure out argc
292 uint32_t argc = argv.size();
293 uint32_t guestArgc = ArmISA::htog(argc);
294
295 //Write out the sentry void *
296 uint32_t sentry_NULL = 0;
297 initVirtMem->writeBlob(sentry_base,
298 (uint8_t*)&sentry_NULL, sentry_size);
299
300 //Fix up the aux vectors which point to other data
301 for (int i = auxv.size() - 1; i >= 0; i--) {
302 if (auxv[i].a_type == M5_AT_PLATFORM) {
303 auxv[i].a_val = platform_base;
304 initVirtMem->writeString(platform_base, platform.c_str());
305 } else if (auxv[i].a_type == M5_AT_EXECFN) {
306 auxv[i].a_val = aux_data_base;
307 initVirtMem->writeString(aux_data_base, filename.c_str());
308 } else if (auxv[i].a_type == M5_AT_RANDOM) {
309 auxv[i].a_val = aux_random_base;
310 // Just leave the value 0, we don't want randomness
311 }
312 }
313
314 //Copy the aux stuff
315 for(int x = 0; x < auxv.size(); x++)
316 {
317 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
318 (uint8_t*)&(auxv[x].a_type), intSize);
319 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
320 (uint8_t*)&(auxv[x].a_val), intSize);
321 }
322 //Write out the terminating zeroed auxilliary vector
323 const uint64_t zero = 0;
324 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
325 (uint8_t*)&zero, 2 * intSize);
326
327 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
328 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
329
330 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
331
332 ThreadContext *tc = system->getThreadContext(contextIds[0]);
333 //Set the stack pointer register
334 tc->setIntReg(StackPointerReg, stack_min);
335 //A pointer to a function to run when the program exits. We'll set this
336 //to zero explicitly to make sure this isn't used.
337 tc->setIntReg(ArgumentReg0, 0);
338 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively
339 if (argv.size() > 0) {
340 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size -
341 argv[argv.size() - 1].size() - 1);
342 } else {
343 tc->setIntReg(ArgumentReg1, 0);
344 }
345 if (envp.size() > 0) {
346 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size -
347 envp[envp.size() - 1].size() - 1);
348 } else {
349 tc->setIntReg(ArgumentReg2, 0);
350 }
351
352 Addr prog_entry = objFile->entryPoint();
353 if (arch == ObjectFile::Thumb)
354 prog_entry = (prog_entry & ~mask(1)) | (ULL(1) << PcTBitShift);
355 tc->setPC(prog_entry);
356 tc->setNextPC(prog_entry + sizeof(MachInst));
357
358 //Align the "stack_min" to a page boundary.
359 stack_min = roundDown(stack_min, pageSize);
360 }
361
362 ArmISA::IntReg
363 ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
364 {
365 assert(i < 4);
366 return tc->readIntReg(ArgumentReg0 + i++);
367 }
368
369 void
370 ArmLiveProcess::setSyscallArg(ThreadContext *tc,
371 int i, ArmISA::IntReg val)
372 {
373 assert(i < 4);
374 tc->setIntReg(ArgumentReg0 + i, val);
375 }
376
377 void
378 ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
379 SyscallReturn return_value)
380 {
381 tc->setIntReg(ReturnValueReg, return_value.value());
382 }