2 * Copyright (c) 2010 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2007-2008 The Florida State University
15 * All rights reserved.
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 * Authors: Stephen Hines
44 #include "arch/arm/isa_traits.hh"
45 #include "arch/arm/process.hh"
46 #include "arch/arm/types.hh"
47 #include "base/loader/elf_object.hh"
48 #include "base/loader/object_file.hh"
49 #include "base/misc.hh"
50 #include "cpu/thread_context.hh"
51 #include "debug/Stack.hh"
52 #include "mem/page_table.hh"
53 #include "mem/translating_port.hh"
54 #include "sim/byteswap.hh"
55 #include "sim/process_impl.hh"
56 #include "sim/system.hh"
59 using namespace ArmISA
;
61 ArmLiveProcess::ArmLiveProcess(LiveProcessParams
*params
, ObjectFile
*objFile
,
62 ObjectFile::Arch _arch
)
63 : LiveProcess(params
, objFile
), arch(_arch
)
65 stack_base
= 0xbf000000L
;
67 // Set pointer for next thread stack. Reserve 8M for main stack.
68 next_thread_stack_base
= stack_base
- (8 * 1024 * 1024);
70 // Set up break point (Top of Heap)
71 brk_point
= objFile
->dataBase() + objFile
->dataSize() + objFile
->bssSize();
72 brk_point
= roundUp(brk_point
, VMPageSize
);
74 // Set up region for mmaps. For now, start at bottom of kuseg space.
75 mmap_start
= mmap_end
= 0x40000000L
;
79 ArmLiveProcess::initState()
81 LiveProcess::initState();
82 argsInit(MachineBytes
, VMPageSize
);
83 for (int i
= 0; i
< contextIds
.size(); i
++) {
84 ThreadContext
* tc
= system
->getThreadContext(contextIds
[i
]);
85 CPACR cpacr
= tc
->readMiscReg(MISCREG_CPACR
);
86 // Enable the floating point coprocessors.
89 tc
->setMiscReg(MISCREG_CPACR
, cpacr
);
90 // Generically enable floating point support.
91 FPEXC fpexc
= tc
->readMiscReg(MISCREG_FPEXC
);
93 tc
->setMiscReg(MISCREG_FPEXC
, fpexc
);
98 ArmLiveProcess::argsInit(int intSize
, int pageSize
)
100 typedef AuxVector
<uint32_t> auxv_t
;
101 std::vector
<auxv_t
> auxv
;
109 //We want 16 byte alignment
112 // load object file into target memory
113 objFile
->loadSections(initVirtMem
);
120 Arm_FastMult
= 1 << 4,
126 Arm_Crunch
= 1 << 10,
127 Arm_ThumbEE
= 1 << 11,
130 Arm_Vfpv3d16
= 1 << 14
133 //Setup the auxilliary vectors. These will already have endian conversion.
134 //Auxilliary vectors are loaded only for elf formatted executables.
135 ElfObject
* elfObject
= dynamic_cast<ElfObject
*>(objFile
);
155 //Bits which describe the system hardware capabilities
156 //XXX Figure out what these should be
157 auxv
.push_back(auxv_t(M5_AT_HWCAP
, features
));
158 //The system page size
159 auxv
.push_back(auxv_t(M5_AT_PAGESZ
, ArmISA::VMPageSize
));
160 //Frequency at which times() increments
161 auxv
.push_back(auxv_t(M5_AT_CLKTCK
, 0x64));
162 // For statically linked executables, this is the virtual address of the
163 // program header tables if they appear in the executable image
164 auxv
.push_back(auxv_t(M5_AT_PHDR
, elfObject
->programHeaderTable()));
165 // This is the size of a program header entry from the elf file.
166 auxv
.push_back(auxv_t(M5_AT_PHENT
, elfObject
->programHeaderSize()));
167 // This is the number of program headers from the original elf file.
168 auxv
.push_back(auxv_t(M5_AT_PHNUM
, elfObject
->programHeaderCount()));
169 //This is the address of the elf "interpreter", It should be set
170 //to 0 for regular executables. It should be something else
171 //(not sure what) for dynamic libraries.
172 auxv
.push_back(auxv_t(M5_AT_BASE
, 0));
174 //XXX Figure out what this should be.
175 auxv
.push_back(auxv_t(M5_AT_FLAGS
, 0));
176 //The entry point to the program
177 auxv
.push_back(auxv_t(M5_AT_ENTRY
, objFile
->entryPoint()));
178 //Different user and group IDs
179 auxv
.push_back(auxv_t(M5_AT_UID
, uid()));
180 auxv
.push_back(auxv_t(M5_AT_EUID
, euid()));
181 auxv
.push_back(auxv_t(M5_AT_GID
, gid()));
182 auxv
.push_back(auxv_t(M5_AT_EGID
, egid()));
183 //Whether to enable "secure mode" in the executable
184 auxv
.push_back(auxv_t(M5_AT_SECURE
, 0));
186 // Pointer to 16 bytes of random data
187 auxv
.push_back(auxv_t(M5_AT_RANDOM
, 0));
189 //The filename of the program
190 auxv
.push_back(auxv_t(M5_AT_EXECFN
, 0));
191 //The string "v71" -- ARM v7 architecture
192 auxv
.push_back(auxv_t(M5_AT_PLATFORM
, 0));
195 //Figure out how big the initial stack nedes to be
197 // A sentry NULL void pointer at the top of the stack.
198 int sentry_size
= intSize
;
200 string platform
= "v71";
201 int platform_size
= platform
.size() + 1;
203 // Bytes for AT_RANDOM above, we'll just keep them 0
204 int aux_random_size
= 16; // as per the specification
206 // The aux vectors are put on the stack in two groups. The first group are
207 // the vectors that are generated as the elf is loaded. The second group
208 // are the ones that were computed ahead of time and include the platform
210 int aux_data_size
= filename
.size() + 1;
212 int env_data_size
= 0;
213 for (int i
= 0; i
< envp
.size(); ++i
) {
214 env_data_size
+= envp
[i
].size() + 1;
216 int arg_data_size
= 0;
217 for (int i
= 0; i
< argv
.size(); ++i
) {
218 arg_data_size
+= argv
[i
].size() + 1;
221 int info_block_size
=
222 sentry_size
+ env_data_size
+ arg_data_size
+
223 aux_data_size
+ platform_size
+ aux_random_size
;
225 //Each auxilliary vector is two 4 byte words
226 int aux_array_size
= intSize
* 2 * (auxv
.size() + 1);
228 int envp_array_size
= intSize
* (envp
.size() + 1);
229 int argv_array_size
= intSize
* (argv
.size() + 1);
231 int argc_size
= intSize
;
233 //Figure out the size of the contents of the actual initial frame
241 //There needs to be padding after the auxiliary vector data so that the
242 //very bottom of the stack is aligned properly.
243 int partial_size
= frame_size
;
244 int aligned_partial_size
= roundUp(partial_size
, align
);
245 int aux_padding
= aligned_partial_size
- partial_size
;
247 int space_needed
= frame_size
+ aux_padding
;
249 stack_min
= stack_base
- space_needed
;
250 stack_min
= roundDown(stack_min
, align
);
251 stack_size
= stack_base
- stack_min
;
254 pTable
->allocate(roundDown(stack_min
, pageSize
),
255 roundUp(stack_size
, pageSize
));
257 // map out initial stack contents
258 uint32_t sentry_base
= stack_base
- sentry_size
;
259 uint32_t aux_data_base
= sentry_base
- aux_data_size
;
260 uint32_t env_data_base
= aux_data_base
- env_data_size
;
261 uint32_t arg_data_base
= env_data_base
- arg_data_size
;
262 uint32_t platform_base
= arg_data_base
- platform_size
;
263 uint32_t aux_random_base
= platform_base
- aux_random_size
;
264 uint32_t auxv_array_base
= aux_random_base
- aux_array_size
- aux_padding
;
265 uint32_t envp_array_base
= auxv_array_base
- envp_array_size
;
266 uint32_t argv_array_base
= envp_array_base
- argv_array_size
;
267 uint32_t argc_base
= argv_array_base
- argc_size
;
269 DPRINTF(Stack
, "The addresses of items on the initial stack:\n");
270 DPRINTF(Stack
, "0x%x - aux data\n", aux_data_base
);
271 DPRINTF(Stack
, "0x%x - env data\n", env_data_base
);
272 DPRINTF(Stack
, "0x%x - arg data\n", arg_data_base
);
273 DPRINTF(Stack
, "0x%x - random data\n", aux_random_base
);
274 DPRINTF(Stack
, "0x%x - platform base\n", platform_base
);
275 DPRINTF(Stack
, "0x%x - auxv array\n", auxv_array_base
);
276 DPRINTF(Stack
, "0x%x - envp array\n", envp_array_base
);
277 DPRINTF(Stack
, "0x%x - argv array\n", argv_array_base
);
278 DPRINTF(Stack
, "0x%x - argc \n", argc_base
);
279 DPRINTF(Stack
, "0x%x - stack min\n", stack_min
);
281 // write contents to stack
284 uint32_t argc
= argv
.size();
285 uint32_t guestArgc
= ArmISA::htog(argc
);
287 //Write out the sentry void *
288 uint32_t sentry_NULL
= 0;
289 initVirtMem
->writeBlob(sentry_base
,
290 (uint8_t*)&sentry_NULL
, sentry_size
);
292 //Fix up the aux vectors which point to other data
293 for (int i
= auxv
.size() - 1; i
>= 0; i
--) {
294 if (auxv
[i
].a_type
== M5_AT_PLATFORM
) {
295 auxv
[i
].a_val
= platform_base
;
296 initVirtMem
->writeString(platform_base
, platform
.c_str());
297 } else if (auxv
[i
].a_type
== M5_AT_EXECFN
) {
298 auxv
[i
].a_val
= aux_data_base
;
299 initVirtMem
->writeString(aux_data_base
, filename
.c_str());
300 } else if (auxv
[i
].a_type
== M5_AT_RANDOM
) {
301 auxv
[i
].a_val
= aux_random_base
;
302 // Just leave the value 0, we don't want randomness
307 for(int x
= 0; x
< auxv
.size(); x
++)
309 initVirtMem
->writeBlob(auxv_array_base
+ x
* 2 * intSize
,
310 (uint8_t*)&(auxv
[x
].a_type
), intSize
);
311 initVirtMem
->writeBlob(auxv_array_base
+ (x
* 2 + 1) * intSize
,
312 (uint8_t*)&(auxv
[x
].a_val
), intSize
);
314 //Write out the terminating zeroed auxilliary vector
315 const uint64_t zero
= 0;
316 initVirtMem
->writeBlob(auxv_array_base
+ 2 * intSize
* auxv
.size(),
317 (uint8_t*)&zero
, 2 * intSize
);
319 copyStringArray(envp
, envp_array_base
, env_data_base
, initVirtMem
);
320 copyStringArray(argv
, argv_array_base
, arg_data_base
, initVirtMem
);
322 initVirtMem
->writeBlob(argc_base
, (uint8_t*)&guestArgc
, intSize
);
324 ThreadContext
*tc
= system
->getThreadContext(contextIds
[0]);
325 //Set the stack pointer register
326 tc
->setIntReg(StackPointerReg
, stack_min
);
327 //A pointer to a function to run when the program exits. We'll set this
328 //to zero explicitly to make sure this isn't used.
329 tc
->setIntReg(ArgumentReg0
, 0);
330 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively
331 if (argv
.size() > 0) {
332 tc
->setIntReg(ArgumentReg1
, arg_data_base
+ arg_data_size
-
333 argv
[argv
.size() - 1].size() - 1);
335 tc
->setIntReg(ArgumentReg1
, 0);
337 if (envp
.size() > 0) {
338 tc
->setIntReg(ArgumentReg2
, env_data_base
+ env_data_size
-
339 envp
[envp
.size() - 1].size() - 1);
341 tc
->setIntReg(ArgumentReg2
, 0);
345 pc
.thumb(arch
== ObjectFile::Thumb
);
346 pc
.nextThumb(pc
.thumb());
347 pc
.set(objFile
->entryPoint() & ~mask(1));
350 //Align the "stack_min" to a page boundary.
351 stack_min
= roundDown(stack_min
, pageSize
);
355 ArmLiveProcess::getSyscallArg(ThreadContext
*tc
, int &i
)
358 return tc
->readIntReg(ArgumentReg0
+ i
++);
362 ArmLiveProcess::getSyscallArg(ThreadContext
*tc
, int &i
, int width
)
364 assert(width
== 32 || width
== 64);
366 return getSyscallArg(tc
, i
);
368 // 64 bit arguments are passed starting in an even register
372 // Registers r0-r6 can be used
375 val
= tc
->readIntReg(ArgumentReg0
+ i
++);
376 val
|= ((uint64_t)tc
->readIntReg(ArgumentReg0
+ i
++) << 32);
382 ArmLiveProcess::setSyscallArg(ThreadContext
*tc
,
383 int i
, ArmISA::IntReg val
)
386 tc
->setIntReg(ArgumentReg0
+ i
, val
);
390 ArmLiveProcess::setSyscallReturn(ThreadContext
*tc
,
391 SyscallReturn return_value
)
393 tc
->setIntReg(ReturnValueReg
, return_value
.value());